Overview; Ads556Xevm Quick-Start Procedure; Circuit Description; Schematic Diagram - Texas Instruments ADS5560EVM User Manual

Overview

1 Overview
This user's guide gives a general overview of the ADS556xEVM evaluation module (EVM) and provides a
general description of the features and functions to be considered while using this module. This manual is
applicable to the ADS556x. The ADS556xEVM provides a platform for evaluating the 16-bit, 40-/80-MSPS,
analog-to-digital converter (ADC) parallel and DDR data output.
Use this document in combination with the respective ADC data sheet.
1.1

ADS556xEVM Quick-Start Procedure

Using the quick-start procedure, many users can begin evaluating the ADC in a short time. The quick-start
procedure uses the default conditions of the EVM as shipped from the factory.
1. Five power supply connectors (banana jack), J11 (3.3 V), J13 (3.3 V), J16 (Vss– for amplifier), J20 (5
V), and J12 (GND) on the EVM are used to connect the EVM with offboard dc power supply. It
provides supply voltage for all devices on the board. A few options for using supply pairs are shown in
Table 1. The default option uses J20 (+5 V) and J12 (GND) to connect with the power supply because
3.3-V and 3.3-V supply voltages are generated on the board for the LDO solution (from 5-V supply
voltage).
2. Connector J9 (SMA) is connected to the path of the ADC clock input. It is used to connected ADC
clock input with the offboard clock source. A sine-wave clock source is recommended for the default
EVM setting.
3. Connectors J6 (SMA) and J8 (SMA) are used to connect the ADC with the offboard analog signal
source. At default, J8 is not installed as it is connected to GND. A single-ended analog signal, for
example a sine wave, is input to J6. Then, it is converted into a differential signal through transformers
T1 and T2 or through T5 and THS4509 to the ADC's differential analog input pins. A few configurations
are possible for the analog input path; the default one is the transformer-coupling configuration through
T1 and T2.
4. By default the DDR LVDS digital output is brought to connector J10 (Samtec).
5. If using TSW1200 capture board from TI, connect TSW1200 to J10 of the ADS556x EVM and follow
the instructions found in
2

Circuit Description

2.1

Schematic Diagram

The schematic diagram for the EVM is in
2.2

EVM Circuit Function

The following sections describe the functions of individual circuits. See the relevant data sheet for device
operating characteristics.
2.2.1 EVM Power Connections
Five power supply connectors (banana jack) J11 (3.3 V), J13 (3.3 V), J16 (Vss– for amplifier), J20 (5 V),
and J12 (GND) on the EVM are used to connect the EVM to offboard dc power supply to support all
devices onboard. A few options for supply connection are shown in
(5 V) and J12 (GND) as well as J16 (for OPA) to connect the EVM with the offboard supply. Two 3.3-V
supply voltages can be generated on board from 5 V through U3(TPS79633DCQ), U8 (TPS79633DCQ),
and U9 (TPS79601DCQ) as the EVM default setting. Two 3.3-V supply voltages can also be provided
from the offboard power supplies through J13 and J11 (see
2 ADS5560/62EVM
Section 4.
Section 5.3.
Table 1. The default one is using J20
Table 1).
SLAU260 – December 2008
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