AOpen MX6E PLUS Manual page 50

Chipset Features à 16 Bit I/O Recovery Time
16 Bit I/O Recovery
Time
1
2
3
4
NA
Chipset Features à Memory Hole At 15M-16M
Memory Hole At
15M-16M
Enabled
Disabled
Chipset Features à Passive Release
Passive Release
Enabled
Disabled
Chipset Features à Delayed Transaction
Delayed Transaction
Enabled
Disabled
The same as 16-bit I/O recovery time. This item lets
you specify the recovery time for the execution of 16-
bit I/O commands by count of ISA bus clock. If you
find any of the installed 16-bit I/O cards unstable, try
extending the I/O recovery time via this item. The
BIOS default value is 1 ISA clocks. If set to NA, the
chipset will automatically insert 3.5 system clocks.
This option lets you reserve system memory area for
special ISA cards. The chipset accesses code/data
of these areas from the ISA bus directly. Normally,
these areas are reserved for memory mapped I/O
card.
This item lets you control the Passive Release
function of the PIIX4 chipset (Intel PCI to ISA bridge).
This function is used to meet latency of ISA bus
master. Try to enable or disable it, if you have ISA
card compatibility problem.
This item lets you control the Delayed Transaction
function of the PIIX4 chipset (Intel PCI to ISA bridge).
This function is used to meet latency of PCI cycles to
or from ISA bus. Try to enable or disable it, if you
have ISA card compatibility problem.
AWARD BIOS
3-15