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AWARD BIOS
Chipset Features à Auto Configuration
Auto Configuration
Enabled
Disabled
Chipset Features à DRAM Speed Selection
DRAM Speed
Selection
50 ns
60 ns
Chipset Features à MA Wait State
MA Wait State
Slow
Fast
Chipset Features à EDO RAS# to CAS# Delay
EDO RAS# to CAS#
Delay
2
3
Chipset Features à EDO RAS# Precharge Time
EDO RAS#
Precharge Time
3
4
3-12
When Enabled, the DRAM and cache related timing
are set to pre-defined value according to CPU type
and clock. Select Disable if you want to specify your
own DRAM timing.
There are two sets of DRAM timing parameters can
be automatically set by BIOS, 50ns and 60ns.
To enable or disable one additional MA (DRAM
memory address) wait state. The default setting is
Slow. Set it to Fast if you have heavy loading (many
chip count) or lower speed DRAM.
This option allows you to set the wait state between
row address strobe (RAS) and column address strobe
(CAS) signals.
This parameter specifies the number of clocks
required to deassert the RAS signal to prevent DRAM
from losing data after performing a read. This
operation is called Precharge.
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