Bill of Materials, Schematics, and Layout
6.2 Schematics
Figure 6-1
through
Figure 6-4
to J27, and the analog signals connect to SMA connectors and input filtering.
decoupling for the device.
VBIAS
AIN1P
AIN1M
AIN2P
AIN2M
AIN3P
AIN3M
AIN4P
AIN4M
AIN5P
AIN5M
AIN6P
AIN6M
AIN7P
AIN7M
AIN8P
AIN8M
18
ADS9817EVM-PDK Evaluation Module
show the various connections to the ADS9817 device. The digital signals connect
TP1
U1A
20
VBIAS
RESET
SMPL_CLK
54
AIN1P
55
AIN1M
SMPL_SYNC
1
AIN2P
DCLKIN
2
AIN2M
DCLKOUT
3
AIN3P
4
AIN3M
FCLKOUT
5
AIN4P
D0
6
AIN4M
D1
D2
9
AIN5P
D3
10
AIN5M
11
AIN6P
12
AIN6M
SPI_EN
13
AIN7P
14
AIN7M
CS
16
AIN8P
SCLK
17
AIN8M
SDI
SDO
38
NC
39
NC
PWDN
50
NC
51
NC
ADS9817IRSHT
1V8_VDD
C15
C16
10V
10V
1µF
0.1µF
GND
GND
5V
21
49
C19
C20
C21
15
10V
10V
10V
56
1µF
0.1µF
0.1µF
22
GND
GND
GND
47
48
1V8_VDD
30
41
C23
10V
0.1µF
GND
1V8_IOVDD
C24
C25
10V
10V
0.1µF
0.1µF
GND
GND
Figure 6-1. ADS9817 Device Connections
Copyright © 2022 Texas Instruments Incorporated
Figure 6-1
RESETz
31
SMPL_CLK
44
SMPL_SYNC
45
43
R10
DCLKOUT
33
33
R11
FCLKOUT
40
33
R12
D0
34
R13
D1
35
33
R14
D2
36
33
R15
D3
37
33
33
SPI_EN
24
CSz
25
SCLK
26
SDI
27
R22
SDO
28
33
PWDNz
32
U1B
19
AVDD_1V8
REFOUT_2V5
AVDD_1V8
52
REFIO
AVDD_5V
AVDD_5V
8
REFM
18
DVDD_1V8
REFM
53
DVDD_1V8
REFM
DVDD_1V8
7
AGND
IOVDD
23
IOVDD
DGND
46
DGND
29
IOGND
42
IOGND
57
Thermal_Pad
ADS9817IRSHT
also shows the
RESETz
SMPL_CLK
SMPL_SYNC
DCLKOUT
FCLKOUT
DATA_D0
DATA_D1
DATA_D2
DATA_D3
SPI_EN
CSz
SCLK
SDI
SDO
PWDNz
TP2
REFOUT_2V5
REFIO
C22
10V
1µF
GND
NT1
Net-Tie
GND
GND
SBAU416 – NOVEMBER 2022
Submit Document Feedback
www.ti.com
Need help?
Do you have a question about the ADS9817EVM-PDK and is the answer not in the manual?