Reference Oscillator; Fractional-N Synthesizer - Motorola CDM Series Detailed Service Manual

Section 12: 2-6
4.1

Reference Oscillator

The reference oscillator (Y4262) contains a temperature compensated crystal oscillator with a
frequency of 16.8 MHz. An analog-to-digital (A/D) converter internal to U4201 (LVFRAC-N) and
controlled by the µP via serial interface (SRL) sets the voltage at the warp output of U4201 pin 25 to
set the frequency of the oscillator. The output of the oscillator (pin 3 of Y4262) is applied to pin 23
(XTAL1) of U4201 via a RC series combination.
In applications where less frequency stability is required the oscillator inside U4201 is used along
with an external crystal Y4261, varactor diode D4261, C4261, C4262 and R4262. In this case,
Y4262, R4263, C4235 and C4251 are not used. When Y4262 is used, Y4261, D4261, C4261,
C4262 and R4262 are not used, and C4263 is increased to 0.1 uF.
4.2

Fractional-N Synthesizer

The LVFRAC-N synthesizer IC (U4201) consists of a pre-scaler, a programmable loop divider,
control divider logic, a phase detector, a charge pump, an A/D converter for low frequency digital
modulation, a balance attenuator to balance high frequency analog modulation and low frequency
digital modulation, a 13V positive voltage multiplier, a serial interface for control, and finally a super
filter for the regulated 5 volts.
DATA (U0101 PIN 100)
CLOCK (U0101 PIN 1)
CSX (U0101 PIN 2)
MOD IN (U0221 PIN 40)
+5V (U4211 PIN 1)
5, 20, 34, 36
+5V (U4211 PIN 1)
REFERENCE
OSCILLATOR
VOLTAGE
MULTIPLIER
A voltage of 5V applied to the super filter input (U4201 pin 30) supplies an output voltage of 4.5
VDC(VSF) at pin 28. It supplies the VCO, VCO modulation bias circuit (via R4322) and the
synthesizer charge pump resistor network (R4251, R4252). The synthesizer supply voltage is
provided by the 5V regulator U4211.
6881091C63-F
UHF Band 1 (403–470 MHz) 25–40 W LDMOS Frequency Synthesis
7
DATA
8
CLK
9
CEX
10
MODIN
13, 30
VCC, DC5V
VDD, DC5V
23
XTAL1
U4201
LOW VOLTAGE
24
XTAL2
FRACTIONAL-N
25
SYNTHESIZER
WARP
32
PREIN
47
VCP
VMULT2 VMULT1
14
15
PRESCALER IN
Figure 12-3 UHF Synthesizer Block Diagram
4
LOCK
LOCK (U0101 PIN 56)
19
FREFOUT
FREF (U0221 PIN 34)
6, 22, 33, 44
GND
43
2-POLE
IOUT
LOOP
45
IADAPT
FILTER
41
MODOUT
3
AUX4
1 (NU)
AUX2
TRB
2
AUX3
FILTERED 5V
28
SFOUT
BIAS1
40
BIAS2
AUX1
39
48
BWSELECT
To IF
Section
STEERING
LINE
VCO Bias
LO RF INJECTION
VOLTAGE
CONTROLLED
OSCILLATOR
TX RF INJECTION
(1ST STAGE OF PA)