Harmonic Filter; Power Control - Motorola CDM Series Detailed Service Manual

VHF (136–174 MHz) 25–45 W LDMOS Frequency Synthesis
3.5

Harmonic Filter

Components L3512 – L3515 and C3564 – C3568 form a nine-pole Chebychev low-pass filter and
attenuate harmonic energy of the transmitter. R3545 is used to drain electrostatic charge that might
otherwise build up on the antenna. The harmonic filter also prevents high-level RF signals above the
receiver passband from reaching the receiver circuits, improving spurious response rejection.
3.6 Directional Coupler
The directional coupler is a microstrip printed circuit, which couples a small amount of the forward
and reflected power delivered by Q3441. The coupled signals are rectified by D3451-2 and
combined by R3540-1. The resulting DC voltage is proportional to RF output power. This RF
power-sensing signal later is combined with the current-sensing signal from U3503 and Q1503 as
well as the temperature-sensing signal from RT3501 and fed to the RFIN port of the PCIC (U3501,
pin 1). The PCIC controls the gain of stage U3401 as necessary to hold the sum of these signals
constant, thus ensuring the forward power out of the radio to be held to a constant value.
An abnormally high reflected power level, such as may be caused by a damaged antenna, also
causes the DC voltage applied to the PCIC to increase, and this will cause a reduction in the gain of
U3401, reducing transmitter output power to prevent damage to the final device due to an improper
load.
3.7

Power Control

The transmitter uses the power control IC (PCIC, U3501) to control the power output of the radio. A
portion of the forward and reflected RF power from the transmitter is sampled by the directional
coupler, rectified and summed, to provide a DC voltage to the RFIN port of the PCIC (pin 1) which is
proportional to the sampled RF power.
The ASFIC contains a digital-to-analog converter (DAC) which provides a reference voltage of the
control loop to the PCIC via R3505. The reference voltage level is programmable through the SPI
line of the PCIC. This reference voltage is proportional to the desired power setting of the
transmitter, and is factory programmed at several points across the frequency range of the
transmitter to offset frequency response variations of the transmitter's power detector circuit.
The PCIC provides a DC output voltage at pin 4 (INT) which is amplified by U3402-1, and applied to
the power-adjust input pin of the first transmitter stage U3401. This adjusts the transmitter power
output to the intended value. Variations in forward or reflected transmitter power cause the DC
voltage at pin 1 to change, and the PCIC adjusts the control voltage above or below its nominal
value to raise or lower output power.
Capacitors C3502-4, in conjunction with resistors and integrators within the PCIC, control the
transmitter power-rise (key-up) and power-decay (de-key) characteristic to minimize splatter into
adjacent channels.
U3502 is a temperature-sensing device, which monitors the circuit board temperature in the vicinity
of the transmitter driver and final devices, and provides a DC voltage to the PCIC (TEMP, pin 29)
proportional to temperature. If the DC voltage produced exceeds the set threshold in the PCIC, the
transmitter output power is reduced so as to reduce the transmitter temperature.
4.0 VHF (136–174 MHz) 25–45 W LDMOS Frequency Synthesis
The frequency synthesizer subsystem consists of the reference oscillator (Y3261 or Y3262), the
Low Voltage Fractional-N synthesizer (LVFRAC-N, U3201), and the voltage-controlled oscillators
and buffer amplifiers (U3301, Q3301-2 and associated circuits).
Section 11: 2-5
6881091C63-F