Harmonic Filter; Power Control; Uhf Band 1 (403-470 Mhz) 25-40 W Ldmos Frequency Synthesis - Motorola CDM Series Detailed Service Manual

UHF Band 1 (403–470 MHz) 25–40 W LDMOS Frequency Synthesis
DC path from PASUPVLTG, through L4437, D4471, L4472, D4472, L4473, R4496 and the current
sink, to ground. Both diodes are forward biased into conduction. The transmitter RF from the
directional coupler is routed via D4471 to the harmonic filter and antenna jack. D4472 also
conducts, shunting RF power and preventing it from reaching the receiver port (RXIN). L4472 is
selected to appear as a broadband lambda/4 wave transmission line, making the short circuit
presented by D4472 appear as an open circuit at the junction of D4472 and the receiver path.
3.6

Harmonic Filter

Components L4491-L4493 and L4472, C4448, C4494, C4496 and C4498 form a Butterworth
low-pass filter to attenuate harmonic energy of the transmitter to specifications level. R4491 is used
to drain electrostatic charge that might otherwise build up on the antenna. The harmonic filter also
prevents high level RF signals above the receiver passband from reaching the receiver circuits,
improving spurious response rejection.
3.7

Power Control

The transmitter uses the Power Control IC (PCIC, U4501) to control the power output of the radio. A
portion of the forward RF power from the transmitter is sampled by the directional coupler and
rectified, to provide a DC voltage to the RFIN port of the PCIC (pin 1) which is proportional to the
sampled RF power.
The ASFIC (U0221) has internal digital-to-analog converters (DACs) which provide a reference
voltage of the control loop to the PCIC via R4483. The reference voltage level is programmable
through the SPI line of the PCIC. This reference voltage is proportional to the desired power setting
of the transmitter, and is factory programmed at several points across the frequency range of the
transmitter to offset frequency response variations of the transmitter's power detector circuit.
The PCIC provides a DC output voltage at pin 4 (INT) which sets the drain current of the first
(U4401). This adjusts the transmitter power output to the intended value. Variations in forward
transmitter power cause the DC voltage at pin 1 to change, and the PCIC adjusts the control voltage
above or below its nominal value to raise or lower output power.
Capacitors C4502-4, in conjunction with resistors and integrators within the PCIC, control the
transmitter power-rise (key-up) and power-decay (de-key) characteristic to minimize splatter into
adjacent channels.
U4502 is a temperature-sensing device, which monitors the circuit board temperature in the vicinity
of the transmitter driver and final devices, and provides a DC voltage to the PCIC (TEMP, pin 30)
proportional to temperature. If the DC voltage produced exceeds the set threshold in the PCIC, the
transmitter output power will be reduced so as to reduce the transmitter temperature.
4.0 UHF Band 1 (403–470 MHz) 25–40 W LDMOS Frequency
Synthesis
The synthesizer subsystem consists of the reference oscillator (Y4261 or Y4262), the Low Voltage
Fractional-N synthesizer (LVFRAC-N, U4201), and the Voltage Controlled Oscillator VCO.
Section 12: 2-5
6881091C63-F