First Power Controlled Stage; Power Controlled Driver Stage; Final Stage; Directional Coupler - Motorola CDM Series Detailed Service Manual

Section 12: 2-4
3.1

First Power Controlled Stage

The first stage (U4401) is a 20dB gain integrated circuit containing two LDMOS FET amplifier
stages. It amplifies the RF signal from the VCO (TXINJ). The output power of stage U4401 is
controlled by a DC voltage applied to pin 1 from Q4473. The control voltage simultaneously varies
the bias of two FET stages within U4401. This biasing point determines the overall gain of U4401
and therefore its output drive level to Q4421, which in turn controls the output power of the PA.
Switch S4440 is a pressure pad with a conductive strip which connects two conductive areas on the
board when the radio's cover is properly screwed to the chassis. When the cover is removed, S4440
opens and cuts the supply voltage to Q4473 thus disabling control voltage to U4401. This prevents
transmitter key up while the devices do not have proper thermal contact to the chassis.
3.2

Power Controlled Driver Stage

The next stage is an LDMOS device (Q4421) providing a gain of 12 dB. This device requires a
positive gate bias and a quiescent current flow for proper operation. The bias is set during transmit
mode by U4501-24 and fed to the gate of Q4421 via the resistive network R4480, R4408, R4415
and R4416.
3.3

Final Stage

The final stage is an LDMOS MRF 1570 device Q4441. It provides a gain of 11dB. It integrates two
MRF1535 die inside. These two die are being run in parallel. The output of each of the device (die)
inside are combined to constitute the total output power. This device also requires a positive gate
bias and a quiescent current flow for proper operation. The voltage of the line MOSBIAS_2 and
MOSBIAS_3 are set in transmit mode by the ASFIC and fed to the gate of Q4441 via two resistive
network R4631, R4634, R4485, R4486 and R4632, R4635, R4481, R4489. These bias voltages are
tuned in the factory. If the transistor is replaced, the bias voltage must be tuned using the Global
Tuner. Care must be taken not to damage the device by exceeding the maximum allowed bias
voltage. The device's drain current is drawn directly from the radio's DC supply voltage input,
PASUPVLTG, via L4421, L4437 and L4436, L4438.
A matching network consisting of C4440 – 45, C4466 – 67, C4476 – 77, C4487, C4491, C4489,
C4490, C4455 – 56, C4449 – 50 and striplines transforms the impedance to 50 ohms and feeds the

directional coupler.

3.4 Directional Coupler
The directional coupler is a microstrip printed circuit, which couples a small amount of the forward
power delivered by Q4441. The coupled signal is rectified by D4451. The DC voltage is proportional
to the RF output power and feeds the RFIN port of the PCIC (U4501 pin 1). The PCIC controls the
gain of stage U4401 as necessary to hold this voltage constant, thus ensuring the forward power out
of the radio to be held to a constant value.
3.5

Antenna Switch

The antenna switch consists of two PIN diodes, D4471 and D4472. In the receive mode, both
diodes are off. Signals applied at the antenna jack J4401 are routed, via the harmonic filter, through
network L4472, C4474 and C4475, to the receiver input. In the transmit mode, K9V1 turns on
Q4471 which enables current sink Q4472, set to 96 mA by R4512 and VR4471. This completes a
6881091C63-F
UHF Band 1 (403–470 MHz) 25–40 W LDMOS Transmitter Power Amplifier (PA) 40W