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Name
ZSW
BUSY
HSW
HIW
Bit
0: Ready status
1: Busy status
*
*
If it takes time to perform slave side processing, slave side busy status is
announced since reply to the master will be delayed. During busy status, other
response data are unfixed values. When the slave side is busy, request from the
master is invalid. Therefore, the same request must be sent again. The response
data of the FR-A7NP during Busy status is as follows.
15
[During Busy status] and
[inverter reset]
PKW
0
ZSW Bit15 = 1
PZD
Other error Bit = 0
Set frequency (0.01 Hz increments)
0 to 15
(Always set frequency (Hz) regardless of the Pr. 37 setting.)
Output frequency (0.01 Hz increments)
0 to 15
(It is always displayed as frequency (Hz) regardless of the Pr. 37 setting.)
PPO TYPE SUPPORT SPECIFICATION
Definition
[During Busy status] and
[other than inverter rest]
All 0 when AK = 0
Reply data when AK ≠ 0
ZSW Bit15 = 1
Other error Bit = inverter status
data
7
49
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