Mitsubishi Electric FR-A7NP E kit-SC Instruction Manual page 5

4.2.1 Operation mode indicator ............................................................................................................................. 18
4.2.2 Operation mode switching and communication startup mode (Pr. 79, Pr. 340) ...........................................19
4.3 Start and Speed Command Sources (Pr. 338, Pr. 339, Pr. 550) ...................................................22
4.3.1 Communication EEPROM write selection (Pr. 342) .....................................................................................26
4.4 Operation at Communication Error Occurrence...........................................................................27
4.4.1 Operation selection at communication error occurrence (Pr. 500 to Pr. 502) .............................................. 27
4.4.2 Fault and measures...................................................................................................................................... 31
4.5 Inverter Reset ...................................................................................................................................32
5 FUNCTIONS
5.1 Output from the inverter to the network ........................................................................................34
5.2 Input to the inverter from the network ...........................................................................................35
6 PROFIBUS DEVICE DATA
6.1 Device data (GSD file)......................................................................................................................36
6.2 Slave user parameter.......................................................................................................................40
7 PPO TYPE SUPPORT SPECIFICATION
7.1 PROFIBUS profiles ..........................................................................................................................41
7.2 ID definitions ....................................................................................................................................42
7.3 Buffer memory map .........................................................................................................................43
7.4 Buffer memory configuration .........................................................................................................44
II
34
36
41