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Chapter 2. Functions
2.15 Internal Signal Monitoring
The user cables provide pins for monitoring the following internal signals.
• Halt mode (HALT.OUT) signal
• Low-speed clock (XT.OUT) signal
• High-speed clock (OSC.OUT) signal
(1) Halt mode (HALT.OUT) signal
"H" level output indicates that the evaluation chip is in halt mode.
(2) Low-speed clock (XT.OUT) signal
This pin monitors the low-speed (XT) clock signal to the evaluation chip.
(3) High-speed clock (OSC.OUT) signal
This pin monitors the high-speed (OSC) clock signal to the evaluation chip.
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n Note 1 n
These three signals use the emulator's internal operating voltage (5 V) for their "H" level.
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