Kontron AT8902M User Manual page 61

AT8902M
Table 3-23: XFP Connector Pin Assignment (Continued)
Pin No Signal
12 MOD_ABS
13 MOD_NR
14 RX_LOS
15 GND
16 GND
17 RD-
18 RD+
19 GND
20 VCC2
21 P_DOWN/RST
22 VCC2
23 GND
24 REFCLK+
25 REFCLK-
26 GND
27 GND
28 TD-
29 TD+
30 GND
3.3.2 XAUI to XFI Transceivers
The two XAUI to XFI transceivers have a 4-lane XAUI interface with 2.5MHz MDIO manage-
ment interface. They incorporate a fully-integrated clock multiplication unit (CMU), clock and
data recovery (CDR), SerDeses and limiting amplifiers. The transceiver operates in asynchro-
nous clock mode which is provided by the elastic buffers. For configuration options of the trans-
ceivers, refer to the AT8902 CLI Reference Manual.
On the AMC edge connector, AMC channels 4 to 7 map to the XAUI port of the transceiver for
XFP1 and AMC channels 8 to 11 to the transceiver XAUI port for XFP2. The user definable
channel 12 contains the MDIO control connection between the fabric switch and the AMC's
XAUI to XFI transceivers.
Description
Indicates Module is not present. Grounded in the Module
Module Not Ready; Indicating XFP Module Operational
Fault
Receiver Loss Of Signal Indicator
Module Ground
Ground
Transmitter Inverted Data Input
Transmitter Non-Inverted Data Input
Ground
+1.8V Power Supply
Power down: When high, requires the module to limit
power consumption to 1.5W or below. I²C serial interface
must be functional in the low power mode.
Reset: The falling edge initiates a complete reset of the
module including the I²C serial interface, equivalent to a
power cycle.
+1.8V Power Supply
Ground
Reference Clock Non-Inverted Input, AC coupled on the
host board
Reference Clock Inverted Input, AC coupled on the host
board
Module Ground
Module Ground
Receiver Inverted Data Output
Receiver Non-Inverted Data Output
Module Ground
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Hardware Description
AT8902M User Guide