Preliminary Intel Pxa27X Interface - Hand Held Products IT4000 Integration Manual

Timing Control LSB (Address O1)
Reserved Reserved
0 0
Initial Hand Held Products Configuration Vertical Timing
Vert
0
Horz
Data
Note the row/line data relationship within each frame. The data presented within each line is the data from that line. The IT4X00
Series engine does not present data rolled over from a previous frame, nor is data rolled back from a future frame (refer to
Considerations, page 2-2).
Initial Hand Held Products Configuration Horizontal Row/Line Timing
Hor
PxCLK
Data

Preliminary Intel PXA27X Interface

®
The Intel PXA27X (Bulverde) integrates a CMOS imager interface on the chip that can be used to interface to the IT4X00 Series.
The interface uses a synchronization tracking timing circuit that is very flexible and relatively easy to use.
IMAGETEAM™ 4X00 Series Integration Manual
Reserved Reserved Reserved
0 1 1
1 2
Active rows/lines 6 to 485
640 Valid Data
VSync Polarity
0=Active Low
1=Active High
Vsync IRQ
479 520
35
Last 5
blank
light
lines
shielded
Last 5
light
shielded
pixels
858
HSync Polarity
0=Active Low
1=Active High
524
First 5 light
shielded lines
First 5
208
light
shielded
pixels
Reserved
1
Vertical
2 - 7