Philips SAA7102 Datasheet page 56

Philips Semiconductors
Digital video encoder
Table 104 Subaddress FCH
DATA BYTE
YHS vertical hot spot of cursor
Table 105 Subaddress FDH
LOGIC
DATA BYTE
LEVEL
LUTOFF 0
1
CMODE 0
1
LUTL 0
1
IF 0
1
2
3
4
5
6
MATOFF 0
1
DFOFF 0
1
Table 106 Subaddress FEH
DATA BYTE
CURSA RAM start address for cursor bit map; the byte following subaddress FEH points to the first cell to be
loaded with the next transmitted byte; succeeding cells are loaded by auto-incrementing until stop
condition
Table 107 Subaddress FFH
DATA BYTE
COLSA RAM start address for colour LUT; the byte following subaddress FFH points to the first cell to be
loaded with the next transmitted byte; succeeding cells are loaded by auto-incrementing until stop
condition
In subaddresses 5BH, 5CH, 5DH, 5EH and 62H all IRE values are rounded up.
2004 Mar 01
colour look-up table is active
colour look-up table is bypassed
cursor mode; input colour will be inverted
auxiliary cursor colour will be inserted
LUT loading via input data stream is inactive
colour and cursor LUTs are loaded via input data stream
input format is 8 + 8 + 8-bit 4 : 4 : 4 non-interlaced RGB or C
input format is 5 + 5 + 5-bit 4 : 4 : 4 non-interlaced RGB
input format is 5 + 6 + 5-bit 4 : 4 : 4 non-interlaced RGB
input format is 8 + 8 + 8-bit 4 : 2 : 2 non-interlaced C
input format is 8 + 8 + 8-bit 4 : 2 : 2 interlaced C
(in subaddresses 91H and 94H set XPIX = number of active pixels/line)
input format is 8-bit non-interlaced index colour
input format is 8 + 8 + 8-bit 4 : 4 : 4 non-interlaced RGB or C
RGB to C -Y-C matrix is active
R B
RGB to C -Y-C matrix is bypassed
R B
down formatter (4 : 4 : 4 to 4 : 2 : 2) in input path is active
down formatter is bypassed
DESCRIPTION
DESCRIPTION
-Y-C
B
-Y-C
B R
DESCRIPTION
DESCRIPTION
56
Product specification
SAA7102; SAA7103
-Y-C
B R
R
(ITU-R BT.656, 27 MHz clock)
-Y-C (special bit ordering)
B R