Philips SAA7102 Datasheet page 44

Philips Semiconductors
Digital video encoder
Table 47 Subaddresses 2AH to 2CH
LOGIC
DATA BYTE
LEVEL
−
CG
CGEN 0
1
Table 48 Subaddress 2DH
LOGIC
DATA BYTE
LEVEL
VBSEN 0
1
CVBSEN1 0
1
CVBSEN0 0
1
CEN 0
1
ENCOFF 0
1
CLK2EN 0
1
Table 49 Subaddresses 38H and 39H
DATA BYTE
GY4 to GY0
GCD4 to GCD0
2004 Mar 01
LSBs of the respective bytes are encoded immediately after run-in, the MSBs of the
respective bytes have to carry the CRCC bits, in accordance with the definition of copy
generation management system encoding format.
copy generation data output is disabled; default after reset
copy generation data output is enabled
pin GREEN_VBS_CVBS provides a component GREEN signal (CVBSEN1 = 0) or CVBS
signal (CVBSEN1 = 1)
pin GREEN_VBS_CVBS provides a luminance (VBS) signal; default after reset
pin GREEN_VBS_CVBS provides a component GREEN (G) or luminance (VBS) signal;
default after reset
pin GREEN_VBS_CVBS provides a CVBS signal
pin BLUE_CB_CVBS provides a component BLUE (B) or colour difference BLUE (C
pin BLUE_CB_CVBS provides a CVBS signal; default after reset
pin RED_CR_C provides a component RED (R) or colour difference RED (C
pin RED_CR_C provides a chrominance signal (C) as modulated subcarrier for S-video;
default after reset
encoder is active; default after reset
encoder bypass, DACs are provided with RGB signal after cursor insertion block
pin TTXRQ_XCLKO2 provides a teletext request signal (TTXRQ)
pin TTXRQ_XCLKO2 provides the buffered crystal clock divided by two (13.5 MHz); default
after reset
Gain luminance of RGB (C
Suggested nominal value = 0, depending on external application.
Gain colour difference of RGB (C
Suggested nominal value = 0, depending on external application.
DESCRIPTION
DESCRIPTION
DESCRIPTION
) output, ranging from (1 −
, Y and C
R B
) output, ranging from (1 −
, Y and C
R B
44
Product specification
SAA7102; SAA7103
) signal
R
⁄ ⁄
16 15
) to (1 + ).
32 32
⁄
16
) to (1 +
32
) signal
B
⁄
15
).
32