Table of Contents
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Schematic Diagrams
DDR3 SO-DIMM_1
SO-DIMM A
D
Layout Note:
signal/space/signal:
7 / 5 / 7
Sheet 7 of 28
DDR3 SO-DIMM_1
C
B
VTT_MEM
C261
10u_6.3V_X5R_06
DDR_V
C73
0.1u_10V_X5R_04
A
DDR_V
C277
10u_6.3V_X5R_06
B - 8 DDR3 SO-DIMM_1
5
4
400
Layout Note:
SO-DIMM_1 is placed farther from the GMCH than SO-DIMM_0
JDIMM2A
[2,8]
M_A_A[15:0]
M_A_A0
98
A0
DQ0
M_A_A1
97
A1
DQ1
M_A_A2
96
A2
DQ2
M_A_A3
95
M_A_A4
A3
DQ3
92
M_A_A5
A4
DQ4
91
A5
DQ5
M_A_A6
90
A6
DQ6
M_A_A7
86
A7
DQ7
M_A_A8
89
M_A_A9
A8
DQ8
85
M_A_A10
A9
DQ9
107
A10/AP
DQ10
M_A_A11
84
A11
DQ11
M_A_A12
83
A12/BC#
DQ12
M_A_A13
119
M_A_A14
A13
DQ13
80
M_A_A15
A14
DQ14
78
A15
DQ15
DQ16
109
[2,8]
M_A_BS0
BA0
DQ17
108
[2,8]
M_A_BS1
BA1
DQ18
79
[2,8]
M_A_BS2
BA2
DQ19
114
[2]
DIMM0_CS#0
S0#
DQ20
121
[2]
DIMM0_CS#1
S1#
DQ21
101
[2]
M_CLK_DDR0
CK0
DQ22
103
[2]
M_CLK_DDR#0
CK0#
DQ23
102
[2]
M_CLK_DDR1
CK1
DQ24
104
[2]
M_CLK_DDR#1
CK1#
DQ25
73
[2]
MEM0_CKE0
CKE0
DQ26
74
[2]
MEM0_CKE1
CKE1
DQ27
115
[2,8]
MEM_CAS#
CAS#
DQ28
110
[2,8]
MEM_RAS#
RAS#
DQ29
113
[2,8]
MEM_W E#
WE#
DQ30
197
SA0
DQ31
201
SA1
DQ32
202
[4,8]
SMB_CLK
SCL
DQ33
200
[4,8]
SMB_DATA
SDA
DQ34
DQ35
116
[2]
DIMM0_ODT0
ODT0
DQ36
120
[2]
DIMM0_ODT1
ODT1
DQ37
[2,8]
MEM_DM[7:0]
MEM_DM0
DQ38
11
DM0
DQ39
MEM_DM1
28
DM1
DQ40
MEM_DM2
46
DM2
DQ41
MEM_DM3
63
DM3
DQ42
MEM_DM4
136
MEM_DM5
DM4
DQ43
153
DM5
DQ44
MEM_DM6
170
DM6
DQ45
MEM_DM7
187
DM7
DQ46
DQ47
12
[2,8]
M_A_DQS0
DQS0
DQ48
29
[2,8]
M_A_DQS1
DQS1
DQ49
47
[2,8]
M_A_DQS2
DQS2
DQ50
64
[2,8]
M_A_DQS3
DQS3
DQ51
137
[2,8]
M_A_DQS4
DQS4
DQ52
154
[2,8]
M_A_DQS5
DQS5
DQ53
171
[2,8]
M_A_DQS6
DQS6
DQ54
188
[2,8]
M_A_DQS7
DQS7
DQ55
DQ56
10
[2,8]
M_A_DQS0#
DQS0#
DQ57
27
[2,8]
M_A_DQS1#
DQS1#
DQ58
45
[2,8]
M_A_DQS2#
DQS2#
DQ59
62
[2,8]
M_A_DQS3#
DQS3#
DQ60
135
[2,8]
M_A_DQS4#
DQS4#
DQ61
152
[2,8]
M_A_DQS5#
DQS5#
DQ62
169
[2,8]
M_A_DQS6#
DQS6#
DQ63
186
[2,8]
M_A_DQS7#
DQS7#
DDRRK-20401-TR4B
DDR_V
C15
C262
C14
C263
C268
+
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*220u_6.3V_6.3*6.3*4.2
DVT 0403
C143
C147
C49
C144
C87
C96
0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.1u_10V_X5R_04
*0.01u_16V_X7R_04
*0.01u_16V_X7R_04
C271
C284
C122
C112
C104
C145
10u_6.3V_X5R_06
*10u_6.3V_X5R_06
0.22u_10V_Y5V_04
0.22u_10V_Y5V_04
*1u_6.3V_X5R_04
1u_6.3V_X5R_04
5
4
3
M_A_DQ[63:0]
[2,8]
M_A_DQ0
5
M_A_DQ1
7
M_A_DQ2
15
17
M_A_DQ3
M_A_DQ4
4
M_A_DQ5
6
M_A_DQ6
16
M_A_DQ7
18
21
M_A_DQ8
M_A_DQ9
23
M_A_DQ10
33
M_A_DQ11
35
M_A_DQ12
22
24
M_A_DQ13
3.3VS
M_A_DQ14
34
M_A_DQ15
36
M_A_DQ16
39
M_A_DQ17
41
C21
51
M_A_DQ18
M_A_DQ19
53
1u_6.3V_X5R_04
M_A_DQ20
40
M_A_DQ21
42
M_A_DQ22
50
52
M_A_DQ23
M_A_DQ24
57
M_A_DQ25
59
M_A_DQ26
DDR_V
67
M_A_DQ27
69
56
M_A_DQ28
R23
M_A_DQ29
58
M_A_DQ30
68
[2,8]
MEM_EVENT#
M_A_DQ31
70
[2,8]
MEM_RESET#
129
M_A_DQ32
131
M_A_DQ33
C158
M_A_DQ34
141
C164
M_A_DQ35
143
M_A_DQ36
130
132
M_A_DQ37
C34
140
M_A_DQ38
C38
M_A_DQ39
142
M_A_DQ40
147
M_A_DQ41
149
157
M_A_DQ42
159
M_A_DQ43
M_A_DQ44
146
M_A_DQ45
148
M_A_DQ46
158
160
M_A_DQ47
CLOSE TO SO-DIMM_0
M_A_DQ48
163
M_A_DQ49
165
M_A_DQ50
MVREF_DIM0
175
R35
1K_1%_04
DDR_V
M_A_DQ51
177
164
M_A_DQ52
M_A_DQ53
166
R48
M_A_DQ54
174
M_A_DQ55
176
1K_1%_04
M_A_DQ56
181
183
M_A_DQ57
M_A_DQ58
191
M_A_DQ59
193
M_A_DQ60
180
M_A_DQ61
182
CLOSE TO SO-DIMM_0
192
M_A_DQ62
M_A_DQ63
194
MVREF_DQA
R89
1K_1%_04
DDR_V
R91
1K_1%_04
C279
+
220u_6.3V_6.3*6.3*4.2
C63
C280
C278
0.01u_16V_X7R_04
4.7u_6.3V_X5R_06
4.7u_6.3V_X5R_06
C134
*1u_6.3V_X5R_04
3
2
1
JDIMM2B
DDR_V
75
44
VDD1
VSS16
76
48
VDD2
VSS17
81
49
VDD3
VSS18
82
54
VDD4
VSS19
87
55
VDD5
VSS20
88
60
VDD6
VSS21
93
61
VDD7
VSS22
94
65
VDD8
VSS23
99
66
VDD9
VSS24
100
71
20mils
VDD10
VSS25
105
72
VDD11
VSS26
106
127
VDD12
VSS27
C20
111
128
VDD13
VSS28
112
133
VDD14
VSS29
*0.1u_16V_Y5V_04
117
134
VDD15
VSS30
118
138
VDD16
VSS31
123
139
VDD17
VSS32
124
144
VDD18
VSS33
145
VSS34
199
150
VDDSPD
VSS35
151
VSS36
77
155
NC1
VSS37
122
156
NC2
VSS38
1K_04
125
161
NCTEST
VSS39
162
VSS40
198
167
EVENT#
VSS41
30
168
RESET#
VSS42
172
VSS43
1u_6.3V_X5R_04
173
MVREF_DQA
MVREF_DQA
VSS44
*0.1u_16V_Y5V_04
1
178
VREF_DQ
VSS45
126
179
VREF_CA
VSS46
184
VSS47
MVREF_DIM0
185
1u_6.3V_X5R_04
VSS48
*0.1u_16V_Y5V_04
2
189
VSS1
VSS49
3
190
VSS2
VSS50
8
195
VSS3
VSS51
9
196
VSS4
VSS52
13
VSS5
14
VSS6
19
VSS7
VTT_MEM
20
VSS8
25
VSS9
26
203
VSS10
VTT1
31
204
VSS11
VTT2
32
VSS12
37
GND1
VSS13
G1
38
GND2
VSS14
G2
43
VSS15
C32
DDRRK-20401-TR4B
0.1u_10V_X5R_04
R87
*0_04
C155
0.1u_10V_X5R_04
[3,4,5,6,8,9,10,11,12,13,15,16,17,18,19,23]
3.3VS
[8,21]
VTT_MEM
[2,6,8,21]
DDR_V
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[07] DDR3 SO-DIMM_1
[07] DDR3 SO-DIMM_1
[07] DDR3 SO-DIMM_1
Size
Size
Size
Document Number
Document Number
Document Number
6-71-W54K0-D02A
6-71-W54K0-D02A
6-71-W54K0-D02A
A3
A3
A3
W 54xKW -D02A
W 54xKW -D02A
W 54xKW -D02A
Date:
Date:
Date:
Thursday, September 12, 2013
Thursday, September 12, 2013
Thursday, September 12, 2013
Sheet
Sheet
Sheet
7
7
7
o f
o f
o f
2
1
D
C
B
A
R e v
R e v
R e v
D02A
D02A
D02A
28
28
28
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