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Signal description related to LVDS interface:
LVDS_A[0..3]+ / LVDS_A[0..3]-: Qseven
LVDS_A_CLK+ / LVDS_A_CLK-: Qseven
LVDS_B[0..3]+ / LVDS_B[0..3]-: Qseven
LVDS_B_CLK+ / LVDS_B_CLK-: Qseven
LVDS_DID_DAT_3V3: Display ID Data line for Flat Panel detection and control. Signal directly routed from Qseven
LVDS_DID_CLK_3V3: Display ID Clock line for Flat Panel detection and control. Signal directly routed from Qseven
LVDS_PANEL_EN: Enable Signal for LVDS LCD Panel Power , is the logical conjunction (i.e. AND) of the signal LVDS_PPEN# and the signal PLT_RST#.
Signal description related to eDP interface:
eDP0_TX[0..3]+ / eDP0_TX[0..3]-: Qseven
eDP0_AUX+ / eDP0_AUX-: Qseven
eDP1_TX[0..3]+ / eDP1_TX[0..3]-: Qseven
eDP1_AUX+ / eDP1_AUX-: Qseven
For both the LVDS and eDP:
LVDS_BACKLIGHT_EN: Enable Signal for Panel Backlight Power, is the logical conjunction (i.e. AND) of the signal LVDS_BLEN# and the signal PLT_RST#
LVDS_BLT_CTRL: Panel Backlight Brightness Control, PWM signal directly routed from Qseven
JP4 position
LCD PWR selector (VDD_LCD)
1-2
+5V_ALW
2-3
+3.3V_ALW
JP3 position
BKLT PWR selector (VDD_BKLT)
1-2
+12V_RUN
2-3
+5V_ALW
(with LVDS or with eDP connectors).
CQ7-D59
CQ7-D59 - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author: S.O. - Reviewed by S.B. Copyright © 2021 SECO S.p.A.
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Module LVDS Channel#A Differential pairs
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Module LVDS Channel#A Differential clock
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Module LVDS Channel#B Differential pairs
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Module LVDS Channel#B Differential clock
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module embedded DP channel#0 differential data pairs
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module embedded DP channel#0 auxiliary channel differential data pair.
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module embedded DP channel#1 differential data pairs
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module embedded DP channel#1 auxiliary channel differential data pair.
The LCD Voltage rail VDD_LCD value can be set to +3.3V_ALW or +5V_ALW by using
dedicated jumper JP4, which is a standard pin header, P2.54mm, 1x3 pin.
Similarly, the Backlight Voltage rail VDD_BKLT value can be set to +5V_ALW or +12V_RUN by
using dedicated jumper jp3, which is another standard pin header, P2.54mm, 1x3 pin.
N.B. Jumpers JP3 and JP4 are always present, independently by the configuration of the board purchased
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Module
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Module
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Module
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