Table of Contents
Advertisement
Quick Reference
JPCIE1_1
CPU2 PCIE 3.0 X8
(JPCIE5)
SXB1B CPU1 PCIE 3.0 X16
(JPCIE1_2)
CMOS CLEAR
JPCIE1_3
SXB1C
S-SATA1
CPU2 PCIE 3.0 X16
S-SGPIO
CPU1 PCIE 3.0 X16
FAN A
Notes:
•
See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connec-
tions.
•
" " indicates the location of Pin 1.
•
Jumpers/LED indicators not indicated are used for testing only.
•
Use only the correct type of onboard CMOS battery as specified by the manufacturer. To
avoid possible explosions, be sure to install the onboard battery right side up.
•
To avoid causing interference with other components, please be sure to use an add-on
card that is fully compliant with the PCI Standards on a PCI slot.
UID
IPMI_LAN
JWD1
(JUIDB1)
JBR1
COM
LE1
(SXB1A)
(JBT1)
S-SATA0
JSTBY1
JIPMB1
IPMI CODE
I-SATA0-3
(JS1)
I-SATA4-7
(JS2)
JPW5
JPW6
FAN D
FAN C
(JPCIE2)
(JPCIE3)
LEDPWR
BT1
LE2
JF2
FAN B
JPW4
JL1
JF1
11
USB0/1(3.0)
(JUSB)
LEDBMC
(LEDM1)
VGA
(JVGA)
JSIOM
JD1
TPM/PORT80
(JTPM1)
JPME1
JPME2
BIOS
BIOS
VROC
LICENSE
(JRK1)
MAC CODE
X11DPG-SN
REV:1.00
BAR CODE
Chapter 1: Introduction
JPW1
P2_NVME0
(JNVME1)
P2_NVME1
(JNVME2)
JPW2
FAN H
FAN G
CPU2 PCIE3.0 X16
(JPCIE4)
JPW7
FAN F
FAN E
FAN 1
Advertisement
Table of Contents
