Bank Interleave; Memory Hole; P2C/P2P Concurrency; System Bios Cacheable - Advantech PCA-6003 Manual

3.5.3 Bank Interleave

This item allows you to select the value in this field, depending on
whether the board has paged DRAMs or EDO (extended data output)
DRAMs. The Choice: EDO 50ns, EDO 60ns,Slow, Medium, Fast,
Turbo.

3.5.4 Memory Hole

In order to improve performance, certain space in memory is reserved
for ISA cards. This memory must be mapped into the memory space
below 16MB. The Choice: 15M-16M, Disabled.

3.5.5 P2C/P2P Concurrency

This item allows you to enable/disable the PCI to CPU, CPU to PCI
concurrency. The Choice: Enabled, Disabled

3.5.6 System BIOS Cacheable

Selecting Enabled allows caching of the system BIOS ROM at F0000h-
FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result. The
choice: Enabled, Disabled.

3.5.7 AGP Aperture Size

Select the size of Accelerated Graphics Port (AGP) aperture. The
aperture is a portion of the PCI memory address range dedicated for
graphics memory address space. Host cycles that hit the aperture
range are forwarded to the AGP without any translation. The Choice:
4M, 8M, 16M, 32M, 65M, 128M, 256M.

3.5.8 Onchip USB

This should be enabled if your system has a USB installed on the
system board and you want to use it. Even when so equipped, if you
add a higher performance controller, you will need to disable this
feature. The choice: Enabled, Disabled.
38 PCA-6003 User's Manual