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Telit Wireless Solutions NL865B1 Manual

Telit Wireless Solutions NL865B1 Manual

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NL865B1
HW Design Guide
1VV0301450 Rev. 1 – 2017-11-20
Mod.0818 2017-01 Rev.0

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Summary of Contents for Telit Wireless Solutions NL865B1

  • Page 1 NL865B1 HW Design Guide 1VV0301450 Rev. 1 – 2017-11-20 Mod.0818 2017-01 Rev.0...

  • Page 2: Notice

    NL865B1 HW Design Guide SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE NOTICE While reasonable efforts have been made to assure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from use of the information obtained herein.

  • Page 3: Usage And Disclosure Restrictions

    NL865B1 HW Design Guide USAGE AND DISCLOSURE RESTRICTIONS License Agreements The software described in this document is the property of Telit and its licensors. It is furnished by express license agreement only and may be used only in accordance with the terms of such an agreement.

  • Page 4: Applicability Table

    NL865B1 HW Design Guide APPLICABILITY TABLE PRODUCTS NL865B1-E1 1VV0301450 Rev. 1 Page 4 of 72 2017-11-20...

  • Page 5: Table Of Contents

    NL865B1 HW Design Guide Contents NOTICE COPYRIGHTS ....................2 COMPUTER SOFTWARE COPYRIGHTS ............2 USAGE AND DISCLOSURE RESTRICTIONS ..........3 APPLICABILITY TABLE ................4 CONTENTS ....................5 INTRODUCTION ................8 Scope ................... 8 Audience..................8 Contact Information, Support ............8 Text Conventions ................
  • Page 6 NL865B1 HW Design Guide 4.3.1.1. +5V Source Power Supply Design Guidelines ......24 4.3.1.2. +12V Source Power Supply Design Guidelines ......25 4.3.1.3. Battery Source Power Supply Design Guidelines ......26 4.3.2. Thermal Design Guidelines ............27 4.3.3. Power Supply PCB layout Guidelines ......... 28 VAUX/PWRMON Power Output ..........
  • Page 7 Recommended footprint for the application ......... 55 PCB pad design ................56 PCB pad dimensions ..............56 Stencil ..................57 Solder paste ................57 NL865B1 Solder reflow ............... 58 PACKING SYSTEM ..............59 Tray .................... 59 Tray Drawing ................61 Tape & Reel ................62 Carrier Tape Drawing..............

  • Page 8: Introduction

    NL865B1 HW Design Guide 1. INTRODUCTION Scope This document introduces the Telit NL865B1 module and presents possible and recommended hardware solutions for developing a product based on this module. All the features and solutions detailed in this document are applicable to all...

  • Page 9: Text Conventions

    NL865B1 HW Design Guide Text Conventions Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur. Caution or Warning – Alerts the user to important points about integrating the module, if these points are not followed, the module and end user equipment may fail or malfunction.

  • Page 10: Related Documents

    NL865B1 HW Design Guide Related Documents • SIM INTEGRATION DESIGN GUIDE 80000NT10001A • NE866B1_NL865B1_AT_Commands_Reference_Guide 80534ST10817A • Telit EVB User Guide 1VV0301249 • xL865_IFBD_HW_USER_GUIDE 1VV0301451 1VV0301450 Rev. 1 Page 10 of 72 2017-11-20...

  • Page 11: General Product Description

    Some examples are smart metering, smart parking, smart agriculture, waste collection, industrial sensors, healthcare monitors, home automation, and many more low data rate IoT devices. The NL865B1 is offered in a dual-band configuration for deployment in the European and Chinese NB-IoT networks, either in in-band, guard-band or standalone mode;...

  • Page 12: Product Variants And Frequency Bands

    B8 (900) Refer to Chapter 13 for details information about frequencies and bands. Target market The NL865B1 can be used for IoT applications, where low power consumption and enhanced coverage are required rather than high speed data, for example: •...

  • Page 13: Main Features

    NL865B1 HW Design Guide Main features Function Features • NB-IoT cellular modem for low BW data communication Modem • Real Time Clock • Internal IP stack Main UART for AT commands • Interfaces Auxiliary UART TX for logging • •...

  • Page 14: Tx Output Power

    NL865B1 HW Design Guide TX Output Power Band Power class LTE All Bands Class 3 (23dBm) RX Sensitivity Product Band Sensitivity (dBm) NL865-B1-E1 B8, B20 -113 Mechanical specifications 2.7.1. Dimensions The overall dimensions of NL865 family are:  Length: 24.4 mm ...

  • Page 15: Temperature Range

    NL865B1 HW Design Guide Temperature range Case Range Note The module is fully functional(*) in all the –20°C ÷ +55°C temperature range, and it fully meets the 3GPP Operating Temperature specifications. Range The module is fully –40°C ÷ +85°C functional (*) in all the temperature range.

  • Page 16: Pins Allocation

    NL865B1 HW Design Guide 3. PINS ALLOCATION Pin-out Signal Function Type Comment Asynchronous Serial Port - Prog. / Data Serial data input CMOS 1.8V from DTE Serial data output CMOS 1.8V to DTE Asynchronous Auxiliary Serial Port 2 / I2C...
  • Page 17 NL865B1 HW Design Guide SIM card interface External SIM signal – Power See next SIMVCC 1.8V Only supply for the chapters External SIM SIMRST CMOS 1.8 signal – Reset External SIM SIMCLK CMOS 1.8 signal – Clock External SIM– SIMIO CMOS 1.8...
  • Page 18 NL865B1 HW Design Guide General purpose I/O 5 (*)GPIO_05/SI Default is CMOS 1.8 M_IN SIMIN SIM Presence input General purpose GPIO_06 CMOS 1.8 I/O 6 General purpose GPIO_07 CMOS 1.8 I/O 7 General purpose GPIO08 CMOS 1.8 I/O 08 Miscellaneous Functions...
  • Page 19 NL865B1 HW Design Guide Ground Power Ground Power Ground Power Ground Power Reserved pins RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED...
  • Page 20 NL865B1 HW Design Guide WARNING: Reserved pins must not be connected NOTE: The functions marked with (*) are not avalable on early samples and will be supported on future release. For more information, please refer to the related SW documentation 1VV0301450 Rev.

  • Page 21: Lga Pads Layout

    NL865B1 HW Design Guide LGA Pads Layout VAUX/PWR SLP_IND RESET* TX AUX I2C_SCL GPIO_01 GPIO_02 GPIO_03 GPIO_04 VBATT VBATT_PA I2C_SDA (*)GPIO_05/ SIMIN SIMVCC GPIO_06 SIMRST GPIO_07 SIMCLK GPIO_08 SIMIO ADC_IN1 LP_WAKE TOP VIEW WARNING Reserved pins must not be connected.

  • Page 22: Power Supply

    NL865B1 HW Design Guide 4. POWER SUPPLY The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product overall performances, hence read carefully the requirements and the guidelines that will follow for a proper design.

  • Page 23: Power Consumption

    NL865B1 HW Design Guide Power Consumption Typical Mode Mode Description Normal mode - Full functionality with AT+CFUN=1 5.3 mA power saving disabled TX/RX disabled, module is not registered AT+CFUN=0 < 4.6 µA to the network 377.8 µA TX=22dBm, T3324 = 30sec, T3412 = 2621.44 s (~44min)

  • Page 24: General Design Rules

    NL865B1 HW Design Guide General Design Rules The principal guidelines for the Power Supply Design embrace three different design steps: • The electrical design • The thermal design • The PCB layout. 4.3.1. Electrical Design Guidelines The electrical design of the power supply depends strongly from the power source where this power is drained.

  • Page 25: Source Power Supply Design Guidelines

    NL865B1 HW Design Guide 4.3.1.2. +12V Source Power Supply Design Guidelines • The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suited and shall not be used.

  • Page 26: Battery Source Power Supply Design Guidelines

    • A protection diode should be inserted close to the power input, in order to save the NL865B1 from power polarity inversion. Otherwise the battery connector should be done in a way to avoid polarity inversions when connecting the battery.

  • Page 27: Thermal Design Guidelines

    The generated heat will be mostly conducted to the ground plane under the NL865B1; you must ensure that your application can dissipate it.

  • Page 28: Power Supply Pcb Layout Guidelines

    500mA current peak is absorbed. • The PCB traces to the NL865B1 and the Bypass capacitor must be wide enough to ensure no significant voltage drops occur. This is for the same reason as previous point.

  • Page 29: Vaux/Pwrmon Power Output

    NL865B1 HW Design Guide VAUX/PWRMON Power Output A 1.8V regulated power supply output is provided in order to supply small devices from the module. The signal is present on Pad 43 This output is always active as long as the module is powered (VBATT applied). It is also active during module sleep mode/ PSM mode.

  • Page 30: 3Gpp Power Saving Mode (Psm)

    Used to wakeup the NL865 from any of the low power modes (either modem or apps). Modem Sleep or PSM indication. “0” – NL865B1 modem is in Sleep mode / SLP_IND PSM. “1” - NL865B1 modem is not in Sleep mode / PSM.

  • Page 31: Lp_Wake Design Guide

    NL865B1 HW Design Guide 4.5.1. LP_WAKE design guide LP Wake signal could be used by the host to wake up the NE866B1 from any of the sleep modes (either modem sleep or application sleep or both) LP Wake signal can be configured to wakeup the system at either rising or falling edge or both edges.

  • Page 32: Digital Section

    NL865B1 HW Design Guide 5. DIGITAL SECTION Logic Levels ABSOLUTE MAXIMUM RATINGS: Parameter Input level on any digital pin (CMOS 1.8) with respect -0.3V 2.1V to ground Input level on any digital pin (CMOS 1.8) with respect -0.3V 0.3V to ground when VBATT is not supplied OPERATING RANGE - INTERFACE LEVELS (1.8V CMOS):...

  • Page 33: Power On

    NL865B1 HW Design Guide Power On The NL865B1 will automatically power on itself when VBATT is applied to the module. VAUX / PWRMON pin will be then set at the high logic level. The following flow chart shows the proper turn on procedure: “Modem ON Proc”...
  • Page 34 NL865B1 HW Design Guide A flow chart showing the AT commands managing procedure is displayed below: “Start AT CMD” START Delay = 300 msec Enter AT <CR> AT answer in Disconnect PWR Supply 1 sec ? GO TO “Start AT CMD”...

  • Page 35: Unconditional Restart

    NL865B1 HW Design Guide Unconditional Restart To unconditionally restart the NL865B1, the pad RESET* must be tied low for at least 200 milliseconds and then released. The maximum current that can be drained from the RESET* pad is 1 mA.
  • Page 36 In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NL865B1 when the module is powered off or during a reboot transition. Using bidirectional level translators which do not support High Z mode during power off is not recommended.
  • Page 37 In order to prevent a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NL865B1 when the module is powered OFF or during an ON/OFF transition. Using bidirectional level translators which do not support High Z mode during power off is not recommended.

  • Page 38: Power Off Procedure

    NL865B1 HW Design Guide Power OFF procedure The NL865B1 does not provide any means of software driven shutdown. In case that power off is required (for example when modem is not used for a long time), the below procedure should be followed in order to eliminate the posible damage due to unexpected power cut.

  • Page 39: Communication Ports

    5.5.1.1. MODEM SERIAL PORT 1 The serial port 1 on the NL865B1 is a +1.8V UART with only 2 RS232 signals. It differs from the PC-RS232 in the signal polarity (RS232 is reversed) and levels. Serial port 1 is considered a “low power UART” and is avalable during LPM and PSM such that any activity in the TXD pin (NE866B1 input) will wakeup the system.
  • Page 40 NL865B1 HW Design Guide NOTE: According to V.24, some signal names are referred to the application side, therefore on the NL865B1 side these signal are on the opposite direction: TXD on the application side will be connected to the receive line...

  • Page 41: Modem Serial Port 2

    NL865B1 HW Design Guide 5.5.1.2. MODEM SERIAL PORT 2 The secondary serial port on the NL865B1 is a CMOS1.8V with only TX signal which is used for logging. The signals of the NL865B1 serial port are: Signal Function Type NOTE...

  • Page 42: Rs232 Level Translation

    NL865B1 HW Design Guide 5.5.1.3. RS232 LEVEL TRANSLATION In order to interface the NL865B1 with a PC com port or a RS232 (EIA/TIA-232) application a level translator is required. This level translator must: • invert the electrical signal in both directions;...
  • Page 43 NL865B1 HW Design Guide NOTE: The digital input lines operating at 1.8V CMOS have an absolute maximum input voltage of 2.2V. The level translator IC outputs on the module side (i.e. module inputs) will cause damage to the module inputs if the level translator is powered by a +3.8V supply. So the level translator IC must be powered from a dedicated +1.8V power...

  • Page 44: General Purpose I/O

    NL865B1 HW Design Guide General purpose I/O The NL865B1 module is provided by a set of Configurable Digital Input / Output pins (CMOS 1.8V) Input pads can only be read; they report the digital value (high or low) present on the pad at the read time.

  • Page 45: Using A Gpio As Input

    In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NL865B1 when the module is powered off or during a powerup/reboot transition. Using bidirectional level translators which do not support High Z mode during power off is not recommended.

  • Page 46: Using A Gpio As Output

    I2C_SCL Pull Up Please refer to the AT command user guide for more information. SIM Interface The NL865B1 supports a standard SIM card interface with the below exceptions: • 1.8V I/O only (3V SIM is not supported). • SIM PIN (SIM lock) feature is not supported.

  • Page 47: Adc Converter

    NL865B1 HW Design Guide ADC Converter The NL865B1 is provided by one ADC converter. It is able to read a voltage level in the range of 0.2÷1.7 volts applied on the ADC pin input, store and convert it into 10 bit word.

  • Page 48: Rf Section

    • NL865B1 meets RED requirement Article 10 item 8. • NL865B1 has been assessed to be used with separation distance more than 20cm. • NL865B1 reference antenna: LTE MAGNETIC ANTENNA Type n° T- AT305 o 700 - 960MHz / 1710 – 2700MHz o Antenna Gain - 2.14dBi...

  • Page 49: Antenna Requirements

    The antenna and antenna transmission line on PCB for a Telit NL865B1 device shall fulfil the following requirements:...

  • Page 50: Pcb Design Guidelines

    Keep the antenna line far away from the NL865B1 power supply lines; • If you have EM noisy devices around the PCB hosting the NL865B1, such as fast switching ICs, take care of the shielding of the antenna line by burying it inside the layers of PCB and surround it with Ground planes, or shield it with a metal frame cover.

  • Page 51: Antenna Installation Guidelines

    NL865B1 HW Design Guide • If you don't have EM noisy devices around the PCB of NL865B1, by using a micro strip on the superficial copper layer for the antenna line, the line attenuation will be lower than a buried one;...

  • Page 52: Mechanical Design

    24.4 mm • Thickness: 2.45 mm (excluding Lable thikness) • Weight: 2.5 gr 7.1.1. Mechanical Drawing 7.1.2. Top View The figure below shows mechanical top view of the NL865B1 Dimensions are in mm 1VV0301450 Rev. 1 Page 52 of 72 2017-11-20...

  • Page 53: Bottom View (As Seen From Bottom Side)

    NL865B1 HW Design Guide 7.1.3. Bottom View (as seen from bottom side) 1VV0301450 Rev. 1 Page 53 of 72 2017-11-20...

  • Page 54: Side View

    NL865B1 HW Design Guide 7.1.4. Side View 7.1.5. Module finishing & dimensions 1VV0301450 Rev. 1 Page 54 of 72 2017-11-20...

  • Page 55: Application Pcb Design

    Recommended footprint for the application Dimensions are in mm In order to easily rework the NL865B1 is suggested to consider on the application a 1.5 mm placement inhibit area around the module. It is also suggested, as common rule for an SMT component, to avoid having a mechanical part of the application in direct contact with the module.

  • Page 56: Pcb Pad Design

    NL865B1 HW Design Guide PCB pad design Non solder mask defined (NSMD) type is recommended for the solder pads on the PCB. PCB pad dimensions The recommendation for the PCB pads dimensions are described in the below image (dimensions in mm) 1VV0301450 Rev.

  • Page 57: Stencil

    NL865B1 HW Design Guide It is not recommended to place via or micro-via not covered by solder resist in an area of 0.3 mm around the pads unless it carries the same signal of the pad itself (see figure below).

  • Page 58: Nl865B1 Solder Reflow

    NL865B1 HW Design Guide NL865B1 Solder reflow Recommended solder reflow profile Profile Feature Pb-Free Assembly Average ramp-up rate (T to T 3°C/second max Preheat – Temperature Min (Tsmin) 150°C – Temperature Max (Tsmax) 200°C – Time (min to max) (ts)

  • Page 59: Packing System

    NL865B1 HW Design Guide 9. PACKING SYSTEM Tray The NL865B1 modules are packaged on trays The tray is JEDEC compliant, injection molded antistatic Modified Polyphenylene ether (MPPO). It has good thermal characteristics and can withstand a standard baking temperature of up to 125°C, thereby avoiding handling the modules if baking is required.
  • Page 60 NL865B1 HW Design Guide Tray organization is shown in the figure below 1VV0301450 Rev. 1 Page 60 of 72 2017-11-20...

  • Page 61: Tray Drawing

    NL865B1 HW Design Guide Tray Drawing WARNING: These trays can withstand a maximum temperature of 125℃. 1VV0301450 Rev. 1 Page 61 of 72 2017-11-20...

  • Page 62: Tape & Reel

    NL865B1 HW Design Guide Tape & Reel The NL865 modules are available on a T&R packaging as well NL865B1 is packaged on reels of 200 pieces each as shown in the figure below. 1VV0301450 Rev. 1 Page 62 of 72...

  • Page 63: Carrier Tape Drawing

    NL865B1 HW Design Guide Carrier Tape Drawing Moisture sensitivity The NL865B1 is a Moisture Sensitive Device level 3, in according with standard IPC/JEDEC J-STD-020, take care all the relatives requirements for using this kind of components. Moreover, the customer has to take care of the following conditions: a) Calculated shelf life in sealed bag: 12 months at <40°C and <90% relative humidity...

  • Page 64: Conformity Assessment Issues

    NL865B1 HW Design Guide CONFORMITY ASSESSMENT ISSUES Declaration of Conformity Hereby, Telit Communications S.p.A declares that the NB IOT Module is in compliance with Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address: http://www.telit.com\red...

  • Page 65: Safety Recommendations

    NL865B1 HW Design Guide SAFETY RECOMMENDATIONS READ CAREFULLY Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas: •...

  • Page 66: Reference Table Of Rf Bands Characteristics

    NL865B1 HW Design Guide REFERENCE TABLE OF RF BANDS CHARACTERISTICS Mode Freq. Tx Freq. Rx Channels Tx-Rx (MHz) (MHz) Offset PCS 1900 1850.2 ~ 1909.8 1930.2 ~ 1989.8 512 ~ 810 80 MHz DCS 1800 1710 ~ 1785 1805 ~ 1880...
  • Page 67 NL865B1 HW Design Guide Mode Freq. Tx Freq. Rx Channels Tx-Rx (MHz) (MHz) Offset LTE 1900 – B2 1850 ~ 1910 1930 ~ 1990 Tx: 18600 ~ 19199 80 MHz Rx: 600 ~ 1199 LTE 1800 – B3 1710 ~ 1785...
  • Page 68 NL865B1 HW Design Guide Mode Freq. Tx Freq. Rx Channels Tx-Rx (MHz) (MHz) Offset LTE 700 – B28 703 ~ 748 758 ~ 803 Tx : 27210 ~ 27659 45 MHz Rx : 9210 ~ 9659 LTE TDD 2600 – B38...

  • Page 69: Acronyms

    NL865B1 HW Design Guide ACRONYMS Telit Technical Support Centre TTSC Universal Serial Bus High Speed Data Terminal Equipment Universal Mobile Telecommunication System UMTS Wideband Code Division Multiple Access WCDMA High Speed Downlink Packet Access HSDPA High Speed Uplink Packet Access...
  • Page 70 NL865B1 HW Design Guide Slave Ready SRDY Chip Select Real Time Clock Printed Circuit Board Equivalent Series Resistance Voltage Standing Wave Radio VSWR Vector Network Analyzer Radio Equipment Directive 1VV0301450 Rev. 1 Page 70 of 72 2017-11-20...

  • Page 71: Document History

    NL865B1 HW Design Guide DOCUMENT HISTORY Revision Date Changes 2017-09-03 First issue 2017-11-20 Section 2.5 – Remove "Class 5 (20dBm)". Section 3.1 – Updated description of PSM pins. Section 4.2 - Added clarification related to measured values. Section 4.5 - Added more info related to PSM signals.
  • Page 72 Mod.0818 2017-01 Rev.0...

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