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NE866B1
HW Design Guide
1VV0301354 Rev. 6 – 2018-02-28
Mod.0818 2017-01 Rev.0

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Summary of Contents for Telit Wireless Solutions NE866B1

  • Page 1 NE866B1 HW Design Guide 1VV0301354 Rev. 6 – 2018-02-28 Mod.0818 2017-01 Rev.0...
  • Page 2: Notice

    NE866B1_Hardware_Design_Guide SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE NOTICE While reasonable efforts have been made to assure the accuracy of this document, Telit assumes no liability resulting from any inaccuracies or omissions in this document, or from use of the information obtained herein. The information in this document has been carefully checked and is believed to be reliable.
  • Page 3: Usage And Disclosure Restrictions

    NE866B1_Hardware_Design_Guide USAGE AND DISCLOSURE RESTRICTIONS License Agreements The software described in this document is the property of Telit and its licensors. It is furnished by express license agreement only and may be used only in accordance with the terms of such an agreement. Copyrighted Materials Software and documentation are copyrighted materials.
  • Page 4: Applicability Table

    NE866B1_Hardware_Design_Guide APPLICABILITY TABLE PRODUCTS NE866B1-E1 1VV0301354 Rev. 6 Page 4 of 70 2018-02-28...
  • Page 5: Table Of Contents

    NE866B1_Hardware_Design_Guide Contents NOTICE COPYRIGHTS ....................2 COMPUTER SOFTWARE COPYRIGHTS ............2 USAGE AND DISCLOSURE RESTRICTIONS ..........3 APPLICABILITY TABLE ................4 CONTENTS ....................5 INTRODUCTION ................8 Scope ................... 8 Audience..................8 Contact Information, Support ............8 Text Conventions ................9 Related Documents ..............
  • Page 6 NE866B1_Hardware_Design_Guide 4.3.1.1. +5V Source Power Supply Design Guidelines ......23 4.3.1.2. +12V Source Power Supply Design Guidelines ......24 4.3.1.3. Battery Source Power Supply Design Guidelines ......25 4.3.2. Thermal Design Guidelines ............26 4.3.3. Power Supply PCB layout Guidelines ......... 27 VAUX/PWRMON Power Output ..........
  • Page 7 Recommended footprint for the application ......... 52 PCB pad design ................53 PCB pad dimensions ..............54 Stencil ..................55 Solder paste ................55 NE866B1 Solder reflow ............... 56 PACKING SYSTEM ..............57 Tray .................... 57 Tray Drawing ................59 Tape & Reel ................60 Carrier Tape Drawing..............
  • Page 8: Introduction

    NE866B1_Hardware_Design_Guide 1. INTRODUCTION Scope This document introduces the Telit NE866B1 module and presents possible and recommended hardware solutions for developing a product based on this module. All the features and solutions detailed in this document are applicable to all NE866B1...
  • Page 9: Text Conventions

    NE866B1_Hardware_Design_Guide Text Conventions Danger – This information MUST be followed or catastrophic equipment failure or bodily injury may occur. Caution or Warning – Alerts the user to important points about integrating the module, if these points are not followed, the module and end user equipment may fail or malfunction.
  • Page 10: Related Documents

    NE866B1_Hardware_Design_Guide Related Documents • SIM INTEGRATION DESIGN GUIDE 80000NT10001A • NE866B1_NL865B1_AT_Commands_Reference_Guide 80534ST10817A • Telit EVB User Guide 1VV0301249 • xE866_IFBD_HW_USER_GUIDE 1VV0301368 1VV0301354 Rev. 6 Page 10 of 70 2018-02-28...
  • Page 11: General Product Description

    2. GENERAL PRODUCT DESCRIPTION Overview The NE866B1 is the first Category NB1 - aka Narrowband IoT (NB-IoT) - product in the Telit portfolio. Specified in the Release 13 of the 3GPP standard, Cat NB1 devices are specifically tailored for IoT applications, offering optimized power consumption and enhanced coverage.
  • Page 12: Target Market

    NE866B1_Hardware_Design_Guide Target market NE866B1 can be used for IoT applications, where low power consumption and enhanced coverage are required rather than high speed data, for example: • Smart metering • Smart parking • Smart agriculture • Waste collection • Industrial sensors •...
  • Page 13: Tx Output Power

    NE866B1_Hardware_Design_Guide TX Output Power Band Power class LTE All Bands Class 3 (23dBm) RX Sensitivity Product Band Sensitivity (dBm) NE866-B1-E1 B8, B20 -113 Mechanical specifications 2.7.1. Dimensions The overall dimensions of NE866 family are:  Length: 19 mm  Width: 15 mm ...
  • Page 14: Temperature Range

    NE866B1_Hardware_Design_Guide Temperature range Case Range Note The module is fully functional(*) in all the –20°C ÷ +55°C temperature range, and it fully meets the 3GPP Operating Temperature specifications. Range The module is fully –40°C ÷ +85°C functional (*) in all the temperature range.
  • Page 15: Pins Allocation

    NE866B1_Hardware_Design_Guide 3. PINS ALLOCATION Pin-out Signal Function Type Comment Asynchronous Serial Port - Prog. / Data / SPI / I2C / GPIO Serial data input CMOS 1.8V from DTE Serial data output CMOS 1.8V to DTE Default GPIO1 GPIO CMOS 1.8V function Alternate SPI_CS...
  • Page 16 NE866B1_Hardware_Design_Guide Asynchronous Auxiliary Serial Port 2 / SPI / I2C / GPIO Primary Logging Auxiliary UART TX_AUX CMOS 1.8V Port (TX Data to DTE) Default Function SPI Master Data Alternate SPI_MOSI CMOS 1.8V Function Alternate GPIO2 GPIO CMOS 1.8V Function GPIO3 GPIO CMOS 1.8V...
  • Page 17 NE866B1_Hardware_Design_Guide SIM card interface External SIM signal See next – Power supply for SIMVCC 1.8V Only chapters the SIM External SIM signal SIMRST CMOS 1.8 – Reset External SIM signal SIMCLK CMOS 1.8 – Clock External SIM– Data SIMIO CMOS 1.8 SIM Presence See next SIMIN...
  • Page 18 NE866B1_Hardware_Design_Guide Power Supply Main power supply VBATT Power (Baseband) Main power supply VBATT Power (Baseband) Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Ground Power Reserved pins RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED...
  • Page 19 NE866B1_Hardware_Design_Guide RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED WARNING: Reserved pins must not be connected 1VV0301354 Rev. 6 Page 19 of 70 2018-02-28...
  • Page 20: Lga Pads Layout

    NE866B1_Hardware_Design_Guide LGA Pads Layout GPIO1 TX AUX SPI_CLK SPI_CS SPI_MOSI VBATT I2C_SDA GPIO2 GPIO3 SPI_MISO VBATT I2C_SCL LP_WAKE ADC_IN1 RESET* SIM_IN SLP_IND SIMIO VAUX/PWRMON SIMCLK SIMRST SIMVCC TOP VIEW NOTE: Alternate functions are marked with dark blue text while default functions are black text For more information, please refer to the related SW documentation WARNING...
  • Page 21: Power Supply

    NE866B1_Hardware_Design_Guide 4. POWER SUPPLY The power supply circuitry and board layout are a very important part in the full product design and they strongly reflect on the product overall performances, hence read carefully the requirements and the guidelines that will follow for a proper design. Power Supply Requirements The external power supply must be connected to VBATT signal and must fulfil the following requirements:...
  • Page 22: Power Consumption

    NE866B1_Hardware_Design_Guide Power Consumption Typical Mode Mode Description AT+CFUN=1 2 mA Normal mode - Full functionality with PSM disabled. (module is idle @DRX Mode with 1.28 sec paging cycle) AT+CFUN=0 < 4 µA TX/RX disabled, module is not registered to the network 377.8 µA TX=22dBm, T3324 = 30sec, T3412 = 2621.44 s (~44min)
  • Page 23: General Design Rules

    NE866B1_Hardware_Design_Guide General Design Rules The principal guidelines for the Power Supply Design embrace three different design steps: • The electrical design • The thermal design • The PCB layout. 4.3.1. Electrical Design Guidelines The electrical design of the power supply depends strongly from the power source where this power is drained.
  • Page 24: Source Power Supply Design Guidelines

    NE866B1_Hardware_Design_Guide 4.3.1.2. +12V Source Power Supply Design Guidelines • The desired output for the power supply is 3.8V, hence due to the big difference between the input source and the desired output, a linear regulator is not suited and shall not be used. A switching power supply will be preferable because of its better efficiency.
  • Page 25: Battery Source Power Supply Design Guidelines

    NE866B1_Hardware_Design_Guide 4.3.1.3. Battery Source Power Supply Design Guidelines The desired nominal output for the power supply is 3.8V and the maximum voltage allowed is 4.2V, hence a single 3.7V Li-Ion cell battery type is suited for supplying the power to the Telit NB866B1 module.
  • Page 26: Thermal Design Guidelines

    The generated heat will be mostly conducted to the ground plane under the NE866B1; you must ensure that your application can dissipate it.
  • Page 27: Power Supply Pcb Layout Guidelines

    • The Bypass low ESR capacitor must be placed close to the Telit NE866B1 power input pads or in the case the power supply is a switching type it can be placed close...
  • Page 28: Vaux/Pwrmon Power Output

    NE866B1_Hardware_Design_Guide VAUX/PWRMON Power Output A 1.8V regulated power supply output is provided in order to supply small devices from the module. The signal is present on Pad G6 This output is always active as long as the module is powered (VBATT applied). It is also active during module sleep mode/ PSM mode.
  • Page 29: 3Gpp Power Saving Mode (Psm)

    Used to wakeup the NE866 from any of the low power modes (either modem or apps). Modem Sleep or PSM indication. “0” – NE866B1 modem is in Sleep mode / PSM SLP_IND “1” - NE866B1 modem is not in sleep mode /...
  • Page 30: Lp_Wake Design Guide

    4.5.1. LP_WAKE design guide LP Wake signal could be used by the host to wake up the NE866B1 from any of the sleep modes (either modem sleep or application sleep or both) LP Wake signal can be configured to wakeup the system at either rising or falling edge or both edges.
  • Page 31: Digital Section

    NE866B1_Hardware_Design_Guide 5. DIGITAL SECTION Logic Levels ABSOLUTE MAXIMUM RATINGS: Parameter Input level on any digital pin (CMOS 1.8) with respect -0.3V 2.1V to ground Input level on any digital pin (CMOS 1.8) with respect -0.3V 0.3V to ground when VBATT is not supplied OPERATING RANGE - INTERFACE LEVELS (1.8V CMOS): Parameter Input high level...
  • Page 32: Power On

    NE866B1_Hardware_Design_Guide Power On The NB866B1 will automatically power on itself when VBATT is applied to the module. VAUX / PWRMON pin will be then set at the high logic level. The following flow chart shows the proper turn on procedure: “Modem ON Proc”...
  • Page 33 NE866B1_Hardware_Design_Guide A flow chart showing the AT commands managing procedure is displayed below: “Start AT CMD” START Delay = 300 msec Enter AT <CR> AT answer in Disconnect PWR Supply 1 sec ? “Start AT CMD” GO TO “Modem ON Proc.” 1VV0301354 Rev.
  • Page 34: Unconditional Restart

    NE866B1_Hardware_Design_Guide Unconditional Restart To unconditionally restart the NE866B1, the pad RESET* must be tied low for at least 200 milliseconds and then released. The maximum current that can be drained from the RESET* pad is 1 mA. The hardware unconditional Restart must not be used during normal operation of the device since it does not detach the device from the network.
  • Page 35 In order to avoid a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NE866B1 when the module is powered off or during a reboot transition. Using bidirectional level translators which do not support High Z mode during power off is not recommended.
  • Page 36 In order to prevent a back powering effect it is recommended to avoid having any HIGH logic level signal applied to the digital pins of the NE866B1 when the module is powered OFF or during an ON/OFF transition. Using bidirectional level translators which do not support High Z mode during power off is not recommended.
  • Page 37: Power Off Procedure

    NE866B1_Hardware_Design_Guide Power OFF procedure The NE866B1 does not provide any means of software driven shutdown. In case that power off is required (for example when modem is not used for a long time), the below procedure should be followed in order to eliminate any possible damage due to unexpected power cut.
  • Page 38: Communication Ports

    Serial port 1 is considered a “low power UART” and is avalable during LPM and PSM such that any activity in the TXD pin (NE866B1 input) will wakeup the system. The following table lists the signals of Serial port 1:...
  • Page 39 NE866B1_Hardware_Design_Guide NOTE: According to V.24, some signal names are referred to the application side, therefore on the NB866B1 side these signal are on the opposite direction: TXD on the application side will be connected to the receive line (here named TXD) RXD on the application side will be connected to the transmit line (here named RXD) For a minimum implementation, only the TXD, RXD lines can be...
  • Page 40: Modem Serial Port 2

    NE866B1_Hardware_Design_Guide 5.5.1.2. MODEM SERIAL PORT 2 The secondary serial port on the NB866B1 is a CMOS1.8V with only TX signal which is used for logging. The signals of the NB866B1 serial port are: Signal Function Type NOTE TX_AUX Auxiliary UART (TX Data CMOS Main Debug &...
  • Page 41 NE866B1_Hardware_Design_Guide By convention the driver is the level translator from the 0-1.8V UART to the RS232 level. The receiver is the translator from the RS232 level to 0-1.8V UART. In order to translate the whole set of control lines of the UART you will need: •...
  • Page 42: General Purpose I/O

    NE866B1_Hardware_Design_Guide General purpose I/O The NB866B1 module is provided by a set of Configurable Digital Input / Output pins (CMOS 1.8V) Input pads can only be read; they report the digital value (high or low) present on the pad at the read time. Output pads can only be written or queried and set the value of the pad output.
  • Page 43: Using A Gpio As An Input

    NE866B1_Hardware_Design_Guide 5.6.1. Using a GPIO as an INPUT The GPIO pads, when used as inputs, can be connected to a digital output of another device and report its status, provided this device has interface levels compatible with the 1.8V CMOS levels of the GPIO. If the digital output of the device to be connected with the GPIO input pad has interface levels different from the 1.8V CMOS, then it can be buffered with an open collector transistor with a 47K pull up to VAUX.
  • Page 44: I2C Port

    The I2C port is shared with SPI. When SPI is used, I2C cannot be used and vice versa. SIM Interface The NE866B1 supports a standard SIM card interface with the below exceptions: • 1.8V I/O only (3V SIM is not supported).
  • Page 45: Rf Section

    • NE866B1 meets RED requirement Article 10 item 8. • NE866B1 has been assessed to be used with separation distance more than 20cm. • NE866B1 reference antenna: LTE MAGNETIC ANTENNA Type n° T- AT305 o 700 - 960MHz / 1710 – 2700MHz Antenna Gain - 2.14dBi...
  • Page 46: Antenna Requirements

    NE866B1_Hardware_Design_Guide Antenna requirements 6.5.1. Main Antenna The antenna connection and board layout design are the most important aspect in the full product design as they strongly affect the product overall performances, hence read carefully and follow the requirements and the guidelines for a proper design. The antenna and antenna transmission line on PCB for a Telit NB866B1 device shall fulfil the following requirements: Item...
  • Page 47: Pcb Design Guidelines

    NE866B1_Hardware_Design_Guide 6.5.2. PCB design guidelines When using the NB866B1, since there's no antenna connector on the module, the antenna must be connected to the NB866B1 antenna pad by means of a transmission line implemented on the PCB. This transmission line shall fulfil the following requirements: Item Value Characteristic...
  • Page 48: Antenna Installation Guidelines

    The following image is showing the NOTE: suggested layout for the In early samples of NE866B1 the Antenna pad connection antenna pad has a closed ring around it (dimensions in mm): as shown below...
  • Page 49: Mechanical Design

    • Length: 19 mm • Width: 15 mm • Thickness: 2.2 mm • Weight: 1.5 gr 7.1.1. Mechanical Drawing 7.1.2. Top View The figure below shows mechanical top view of the NE866B1 1VV0301354 Rev. 6 Page 49 of 70 2018-02-28...
  • Page 50: Bottom View (As Seen From Bottom Side)

    NE866B1_Hardware_Design_Guide Dimensions are in mm 7.1.3. Bottom View (as seen from bottom side) 1VV0301354 Rev. 6 Page 50 of 70 2018-02-28...
  • Page 51: Side View

    NE866B1_Hardware_Design_Guide 7.1.4. Side View 1VV0301354 Rev. 6 Page 51 of 70 2018-02-28...
  • Page 52: Application Pcb Design

    NE866B1_Hardware_Design_Guide 8. APPLICATION PCB DESIGN The NB866B1 modules have been designed in order to be compliant with a standard lead- free SMT process Recommended footprint for the application 1VV0301354 Rev. 6 Page 52 of 70 2018-02-28...
  • Page 53: Pcb Pad Design

    NE866B1_Hardware_Design_Guide In order to easily rework the NB866B1 is suggested to consider on the application a 1.5 mm placement inhibit area around the module. It is also suggested, as common rule for an SMT component, to avoid having a mechanical part of the application in direct contact with the module.
  • Page 54: Pcb Pad Dimensions

    NE866B1_Hardware_Design_Guide PCB pad dimensions The recommendation for the PCB pads dimensions are described in the following image (dimensions in mm) It is not recommended to place via or micro-via not covered by solder resist in an area of 0,3 mm around the pads unless it carries the same signal of the pad itself Holes in pad are allowed only for blind holes and not for through holes.
  • Page 55: Stencil

    NE866B1_Hardware_Design_Guide Recommendations for PCB pad surfaces: Finish Layer Thickness (um) Properties 3 –7 / 0.05 – 0.15 Electro-less Ni / Immersion good solder ability protection, high shear force values The PCB must be able to resist the higher temperatures which are occurring at the lead- free process.
  • Page 56: Ne866B1 Solder Reflow

    NE866B1_Hardware_Design_Guide NE866B1 Solder reflow Recommended solder reflow profile Profile Feature Pb-Free Assembly Average ramp-up rate (T to T 3°C/second max Preheat – Temperature Min (Tsmin) 150°C – Temperature Max (Tsmax) 200°C – Time (min to max) (ts) 60-180 seconds Tsmax to TL –...
  • Page 57: Packing System

    NE866B1_Hardware_Design_Guide 9. PACKING SYSTEM Tray The NB866B1 modules are packaged on trays The tray is JEDEC compliant, injection molded antistatic Modified Polyphenylene ether (MPPO). It has good thermal characteristics and can withstand a standard baking temperature of up to 125°C, thereby avoiding handling the modules if baking is required. The trays are rigid, thus providing mechanical protection against transport stress.
  • Page 58 NE866B1_Hardware_Design_Guide Tray organization is shown in the figure below 1VV0301354 Rev. 6 Page 58 of 70 2018-02-28...
  • Page 59: Tray Drawing

    NE866B1_Hardware_Design_Guide Tray Drawing WARNING: These trays can withstand a maximum temperature of 125℃. 1VV0301354 Rev. 6 Page 59 of 70 2018-02-28...
  • Page 60: Tape & Reel

    NE866B1_Hardware_Design_Guide Tape & Reel The NE866 modules are available on a T&R packaging as well NE866B1 is packaged on reels of 200 pieces each as shown in the figure below. 1VV0301354 Rev. 6 Page 60 of 70 2018-02-28...
  • Page 61: Carrier Tape Drawing

    NE866B1_Hardware_Design_Guide Carrier Tape Drawing Moisture sensitivity The NB866B1 is a Moisture Sensitive Device level 3, in according with standard IPC/JEDEC J-STD-020, take care all the relatives requirements for using this kind of components. Moreover, the customer has to take care of the following conditions: a) Calculated shelf life in sealed bag: 12 months at <40°C and <90% relative humidity (RH).
  • Page 62: Conformity Assessment Issues

    NE866B1_Hardware_Design_Guide CONFORMITY ASSESSMENT ISSUES Declaration of Conformity Hereby, Telit Communications S.p.A declares that the NB IOT Module is in compliance with Directive 2014/53/EU. The full text of the EU declaration of conformity is available at the following internet address: http://www.telit.com\red 1VV0301354 Rev.
  • Page 63: Safety Recommendations

    NE866B1_Hardware_Design_Guide SAFETY RECOMMENDATIONS READ CAREFULLY Be sure the use of this product is allowed in the country and in the environment required. The use of this product may be dangerous and has to be avoided in the following areas: • Where it can interfere with other electronic devices in environments such as hospitals, airports, aircrafts, etc.
  • Page 64: Reference Table Of Rf Bands Characteristics

    NE866B1_Hardware_Design_Guide REFERENCE TABLE OF RF BANDS CHARACTERISTICS Mode Freq. Tx Freq. Rx Channels Tx-Rx Offset (MHz) (MHz) PCS 1900 1850.2 ~ 1909.8 1930.2 ~ 1989.8 512 ~ 810 80 MHz DCS 1800 1710 ~ 1785 1805 ~ 1880 512 ~ 885 95 MHz GSM 850 824.2 ~ 848.8...
  • Page 65 NE866B1_Hardware_Design_Guide Mode Freq. Tx Freq. Rx Channels Tx-Rx Offset (MHz) (MHz) LTE 1900 – B2 1850 ~ 1910 1930 ~ 1990 Tx: 18600 ~ 19199 80 MHz Rx: 600 ~ 1199 LTE 1800 – B3 1710 ~ 1785 1805 ~ 1880 Tx: 19200 ~ 19949 95 MHz Rx: 1200 ~ 1949...
  • Page 66 NE866B1_Hardware_Design_Guide Mode Freq. Tx Freq. Rx Channels Tx-Rx Offset (MHz) (MHz) LTE 700 – B28 703 ~ 748 758 ~ 803 Tx : 27210 ~ 27659 45 MHz Rx : 9210 ~ 9659 LTE TDD 2600 – B38 2570 ~ 2620 2570 ~ 2620 Tx: 37750 ~ 38250 0 MHz...
  • Page 67: Acronyms

    NE866B1_Hardware_Design_Guide ACRONYMS Telit Technical Support Centre TTSC Universal Serial Bus High Speed Data Terminal Equipment Universal Mobile Telecommunication System UMTS Wideband Code Division Multiple Access WCDMA High Speed Downlink Packet Access HSDPA High Speed Uplink Packet Access HSUPA Universal Asynchronous Receiver Transmitter UART High Speed Inter Chip HSIC...
  • Page 68 NE866B1_Hardware_Design_Guide Slave Ready SRDY Chip Select Real Time Clock Printed Circuit Board Equivalent Series Resistance Voltage Standing Wave Radio VSWR Vector Network Analyzer Radio Equipment Directive 1VV0301354 Rev. 6 Page 68 of 70 2018-02-28...
  • Page 69: Document History

    NE866B1_Hardware_Design_Guide DOCUMENT HISTORY Revision Date Changes 2017-01-31 First issue Updated “3.2 LGA Pad Layout” 2017-03-15 2017-04-03 Major cleanup Major update related to ENG samples 2017-07-26 Updated Document Template Section 3.1 - Fixed typo is pinmap section Section 4.2 - Updated Current consumption spec Section 4.3 –...
  • Page 70 Mod.0818 2017-01 Rev.0...

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