Advertisement

Quick Links

EC Declaration of Conformity
We
Iwill Corp.
No. 10, Wu Chuan 3rd Rd.,
Hsin Chuang City, Taipei,
Taiwan, R.O.C.
Declare under sole responsibility that the
DPIILS2 motherboard
Meets the intent of Directive 89/336/ECC for Electromagnetic Compatibility. Compliance
was demonstrated to the following specifications as listed in the official Journal of the
European Communities:
EN 50081-1 Emissions:
EN 55022
EN 55022
EN 60555-2 Power Harmonics
EN 50082-1 Immunity:
IEC
IEC
IEC
Radiated, Class B
Conducted, Class B
801-2 Electrostatic Discharge
801-3 RF Radiate
801-4 Fast Transient
1

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the DPIILS2 and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Summary of Contents for IWILL DPIILS2

  • Page 1 Hsin Chuang City, Taipei, Taiwan, R.O.C. Declare under sole responsibility that the DPIILS2 motherboard Meets the intent of Directive 89/336/ECC for Electromagnetic Compatibility. Compliance was demonstrated to the following specifications as listed in the official Journal of the European Communities:...
  • Page 2 Most of the features of this product have passed strict verification and are subject to change at any time without notice. If any malfunction occurs due to the future technical changes made by the respective component manufacturers, Iwill assumes no responsibility or liability for it.
  • Page 3: Table Of Contents

    ACTOR CHAPTER 1 ......................13 QUICK INSTALLATION ..................13 CHAPTER 2 ......................16 HARDWARE INSTALLATION................16 2.1 P ...............16 REPARATION AND NSPECTION 2.2 U DPIILS2..................16 NPACK THE 2.3 I ................17 NSTALLATION PROCEDURES CHAPTER 3 ......................26 SYSTEM BIOS SETUP ..................26 3.1 I ....................26 NTRODUCTION 3.2 M ....................28...
  • Page 4 CHAPTER 4 ......................49 SCSI BIOS SETUP ....................49 4.1 I ....................49 NTRODUCTION 4.2 C ..........49 ONFIGURE DAPTER ETTINGS 4.3 SCSI D ..................54 TILITIES...
  • Page 5: Chapter 0

    Chapter 0 Overview Thank you for purchasing Iwill DPIILS2 motherboard This operation manual will instruct you how to configure and install the system properly. It contains an overview about the engineering design and features of this product. Also, this manual provides useful information for later on upgrade or configuration change.
  • Page 6: Features

    0.1 Features 0.1.1 Processor ® Single or dual Pentium II processor support Supports 66 MHz bus speed ® Supports all published Pentium II processor voltages S.E.C. (Single Edge Contact) cartridge Slot 1 connector Easy-jumper to set the processor speed from 233 MHz to 333 MHz 0.1.2 Core Logic Intel 82443LX PCI/A.G.P.
  • Page 7: Environment Requirements

    0.1.5 Multi I/O Winbond W83977TF super I/O controller Supports two floppy disk drives (include 3 Mode drive) and / or QIC-80 tape drive Supports one multi-mode parallel port Supports two high speed 16550 FIFO serial ports Integrated keyboard controller Integrated PS/2 mouse controller 0.1.6 Expansion slots Three ISA slot Three PCI slot...
  • Page 8 The potential relation between 3.3 VDC and +5 VDC power rails The current capability of the +5VSB line All timing parameters...
  • Page 9: Motherboard Components Placement

    0.3 Motherboard Components Placement The following figure shows the location of the motherboard components. FIRRX IRRX IRTX CIRRX J1-3 PCIx P. SLOT1 S. SLOT1 RAIDport II DIMM0~3 SEC.IDE FLOPPY CH.#1 PWR ON CH.#1 CH.#2 PRI.IDE SENSE 1--2:Normal +12V 1--2: SCSI Enable 2--3:Clear CMOS 2--3: SCSI Disable Cathode-...
  • Page 10 Location ScreenPrinting Description J1--J3 J1--J3 ISA expansion slots Standard ATX power connector Serial 2 connector Parallel connector Serial 1 connector Two USB connectors PS/2 keyboard connector PS/2 mouse connector J11--J14 PCI1--4 PCI expansion slots A.G.P. connector P.Slot1 Primary processor Slot 1 Pri.
  • Page 11: Back Panel Connectors

    0.4 Back Panel Connectors The following figure shows the location of the back panel I/O connectors, which include: PS/2-style keyboard and mouse connectors Two USB connectors Two serial port connectors One parallel port connector Parallel Mouse USB1 Keyboard Serial 1 Serial 2 USB0...
  • Page 12: Form Factor

    0.5 Form Factor The motherboard is designed to fit into an ATX form-factor chassis. The I/O connector locations and the mounting hole locations are in compliance with the ATX specification. Please see detail in the following figure. Datum (0, 0) 6.250 R E A R I / O W I N D O W I N C H A S S I S 0.156 inch...
  • Page 13: Chapter 1

    Chapter 1 Quick Installation Several easy installation steps will be described in this chapter to help the experienced users with quick installation. If you are a beginner or need to know more about this product, refer to the Chapter 2. Step 1.
  • Page 14 Step 6. Connect the Reset button The 2-pin reset header is located on pins 9--10 (marked as RESET) of the front panel connector. Connect the momentary type switch on the chassis to this header for reset function. Signal of RESET header Pin 9 Ground Pin 10...
  • Page 15 Step 10. Connect the SCSI LED The 2-pin SCSI LED header is located on pins 7--8 (marked as SCSI LED) of the front panel connector. Connect the chassis’s LED to this header. Signal of SCSI LED header Pin 7 Anode (+) Pin 8 Cathode (-) Step 11.
  • Page 16: Chapter 2

    If possible, ground yourself by touching a metal table or your computer frame. Keep the board in its conductive wrapping until it is configured and ready to be installed in your system. 2.2 Unpack the DPIILS2 You should find the following components when opening the box: One motherboard...
  • Page 17: Installation Procedures

    2.3 Installation procedures 2.3.1 Processors (J16, J19, J17 and J20) The motherboard supports single or dual Pentium ® II processor. If you are installing two processors, the following values must be identical for both processors: L2 cache size and type (ECC or non-ECC) Operating voltages Bus and core frequencies The processor’s VID pins automatically program the voltage regulator on the motherboard to the...
  • Page 18 2.3.2 Processor frequency Selection (JP2) JP2 is a 2x10-pin jumper block with Easy-jumper cap on it for you to select the processor’s working speed easily. Processor OFF OFF OFF OFF OFF For Pentium ® II 233 MHz OFF ON OFF OFF OFF OFF For Pentium ® II 266 MHz OFF OFF ON OFF OFF OFF For Pentium ®...
  • Page 19 Case B. You can add an extra jumper cap to change the external clock. Extra jumper cap position Force Ext. Clock to 83 MHz 66 MHz 75 MHz For example: With a Pentium II 266 MHz CPU, one should put “only one” jumper cap onto the location “266”...
  • Page 20 2.3.4 Accelerated Graphics Port (AGP) The Accelerated Graphics Port (A.G.P.) is a high-performance interconnect, especially for graphic-intensive 3D applications. A.G.P. is independent of the PCI bus and is intended for exclusive use with graphical display devices. The A.G.P. supports AC timing for 133 MHz data transfer rates, allowing data throughput of 533 MB/sec.
  • Page 21 2.3.9 Universal Serial Bus (J8) The USB is suitable for mid-to-low speed devices like mouse, keyboard, joystick...etc. In the past, all these devices were using different connectors, and it is difficult for end users to install the system. With USB technology, users only need to plug all their USB peripherals on the connector in chain and ready to go.
  • Page 22 2.3.12 Power On header (PWR ON) This header can be connected to chassis’s power switch. Because of debounce circuitry on the motherboard, the switch must be pressed for at least 50 ms to signal the power supply to switch on or off.
  • Page 23 2.3.13.4 Power LED and KEYLOCK header (KEYLOCK) The power LED and keylock header is located on pins 11--15 (marked as KEYLOCK) of the front panel. It contains two functions: the power on LED header and the keylock header. The power on LED can be connected to a LED. When the computer is powered on, the LED will be lighted up.
  • Page 24 2.3.16 System Hardware Monitor The system hardware monitor supports following features: Integrated temperature sensor to monitor system temperature Voltage sense monitoring to detect voltage level (+12 V, -12 V, +5 V, -5 V, +3.3 V) Fan speed sensors for up to three fans With a proprietary application, the system hardware monitor logic will check the voltage, temperature and fan speed all the time.
  • Page 25 The following figure shows the correct SCSI bus topology. External Kit Int. Narrow Int. Wide Device Device Int. Wide Int. Narrow Device Device Terminator Ext. Device Ext. Device 8 bit cable 16 bit cable Narrow Wide Connector Connector 2.3.18 Adaptec RAIDport connector (RAIDPORT II) The onboard RAIDport II connector, in conjunction with an Adaptec ARO-1130CA-B RAIDport II card and the onboard SCSI controller, provides a complete client solution.
  • Page 26: Chapter 3

    3.1.1 Upgrade BIOS The BIOS can be upgraded from a diskette with the Award Flash utility -- AWDFLASH.EXE. The BIOS image file and the update utility are available from Iwill’s WEB site: www.iwill.com.tw. 3.1.2 Recovering BIOS Data Some types of failure can destroy the BIOS.
  • Page 27 3.1.4 Using BIOS setup program The following table shows the function keys available for menu screens. <Up> Move to the previous field <Down> Move to the next field <Left> Move to the field in the left hand <Right> Move to the field in the right hand <Esc>...
  • Page 28: Main Menu

    3.2 Main Menu The main menu allows you to select from several setup pages. Use the arrow keys to select among these pages and press <Enter> key to enter the sub-menu. Note that a brief description of each highlighted selection appears at the bottom of the screen. The main menu includes the following setup pages.
  • Page 29 3.3.2 Time This field specifies the current time. The time format is <hour>, <minute>, and <second>. The time is calculated based on the 24-hour military-time clock. 3.3.3 Primary Master / Primary Slave / Secondary Master / Secondary Slave This field specifies the geometric parameters and translation mode of IDE disk drives. 3.3.3.1 TYPE This field specifies the drive type that corresponds to the drive installed in the system.
  • Page 30 3.3.3.5 MODE This field specifies the IDE translation mode. Options Description NORMAL Specifies traditional CHS addressing mode LARGE Specifies extended CHS translation mode Specifies LBA translation mode AUTO BIOS specifies translation method automatically 3.3.4 Drive A / Drive B This field specifies the traditional type of the floppy drives. Options Description None...
  • Page 31 3.3.7 Halt On This field specifies the failure event, which should halt the system if occurred. Options Description All Errors When the BIOS detects a non-fatal error, the system will stop and you will be prompted No Errors The system will not stop for any error that may be detected All, But Keyboard The system will stop for any errors except keyboard error All, But Diskette...
  • Page 32: Bios Features Setup

    3.4 BIOS FEATURES SETUP This setup page specifies advanced features available through the BIOS. 3.4.1 Virus Warning When this function is enabled, the BIOS will monitor the boot sector and partition table of the hard disk drive for any attempt at modification. If an attempt is made, the BIOS will halt the system and then prompts an error message.
  • Page 33 3.4.5 Boot Sequence This field configures the boot sequence of boot devices. Options Description A,C,SCSI (*) System will first try to boot from floppy drive then master IDE disk drive on primary channel and then SCSI disk drive C,A,SCSI Master IDE disk drive on primary channel, floppy drive, SCSI disk driver C,CDROM,A Master IDE disk drive on primary channel, ATAPI CDROM drive,...
  • Page 34 3.4.8 Boot Up NumLock Status This field configures the numeric keypad after system booting up. Options Description On (*) Keypad works as number keys Keypad works as arrow keys 3.4.9 Gate A20 Option This field configures how the gate A20 is handled. The gate A20 is a device used to address memory above 1 Mbytes.
  • Page 35 3.4.13 Security Option This field configures how the system security is handled. It works conjunction with SETTING SUPERVISOR / USER PASSWORD page to control the security level of the system. Options Description Setup (*) System need password to enter BIOS setup program System System need password to boot 3.4.14 PCI / VGA Palette Snoop...
  • Page 36: Chipset Features Setup

    3.4.19 C8000-CBFFF / CC000-CFFFF / D0000-D3FFF Shadow D4000-D7FFF / D8000-DBFFF / DC000-DFFFF Shadow When enabled, the extended ROM data located at the respective address range will be copied to system memory. Options Enabled Disabled (*) 3.5 CHIPSET FEATURES SETUP This setup page is used to specify advanced features available through the chipset. The default settings have been chosen carefully for the most operating conditions.
  • Page 37 3.5.4 EDO RAS# To CAS# Delay This field specifies the EDO/FPM DRAM timing from RAS# to CAS#. This is for experienced users only. Options Description 2 system clocks 3 (*) 3 system clocks 3.5.5 EDO RAS# Precharge Time This field specifies the EDO/FPM DRAM timing for RAS# pre-charge. This is for experienced users only.
  • Page 38 3.5.9 CPU-TO-PCI IDE Posting When enabled, the data from processor to PCI IDE can be posted to increase performance. Otherwise, the cycles are treated as normal I/O write transaction. This field is for the experienced users only. Options Enabled Disabled (*) 3.5.10 System BIOS Cacheable When enabled, accesses to the system BIOS will be cached.
  • Page 39 3.5.15 Memory Hole At 15M-16M Some add-in cards need to re-map its resource to a block of main memory address range. Any host cycles that match this memory hole are passed on to the add-in cards. Options Enabled Disabled (*) 3.5.16 AGP Aperture Size (MB) This field specifies the size of system memory that can be used for A.G.P.
  • Page 40: Power Manegement Setup

    3.5.20 Passive Release When enabled, the south bridge PIIX4 will support the Passive Release mechanism when it is a PCI master. The PCI revision 2.1 compliant requires this field to be enabled. This field is for experienced users only. Options Enabled (*) Disabled 3.5.21 Delayed Transaction...
  • Page 41 3.6.2 PM Control by APM When enabled, an Advanced Power Management (APM) protocol will be activated to handle the power saving mode. Options Yes (*) 3.6.3 Video off Method This field specifies the method that video subsystem used for power saving. Options Description V/H SYNC+Blank (*)
  • Page 42 3.6.8 Suspend Mode This field specifies the timer value of Suspend Mode. It is available only when the Power Management field set to User Define. Options 1 Min / 2 Min / 4 Min / 8 Min / 12 Min / 20 Min 30 Min / 40 Min / 1 Hour / Disable 3.6.9 HDD Power Down This field specifies the timer value for HDD power down.
  • Page 43: Pnp/ Pci Configuration

    3.6.14 Reload Global Timer Events This field configures the events to reload the power saving mode timer. IRQ [3-7,9-15], NMI If enabled, timer will be reloaded when any of these interrupts occurs. Primary IDE 0 If enabled, timer will be reloaded when master disk of primary IDE channel is active. Primary IDE 1 If enabled, timer will be reloaded when slave disk of primary IDE channel is active.
  • Page 44 3.7.3 Reset Configuration Data When enabled, the extended configuration data (ESCD) will be cleared during each boot time. Options Enabled Disabled (*) 3.7.4 IRQ 3 / 4 / 5 / 7 / 9 / 10 / 11 / 12 / 14 / 15 assigned to DMA 0 / 1 / 3 / 5 / 6 / 7 assigned to If the Resources Controlled By field is set as Manual, these resource fields can be assigned by the user.
  • Page 45: Integrated Peripherals

    Options Description PCI-AUTO (*) The BIOS detects PCI IDE card’s location automatically PCI-Slot1 The PCI IDE card located on PCI slot 1 PCI-Slot2 The PCI IDE card located on PCI slot 2 PCI-Slot3 The PCI IDE card located on PCI slot 3 PCI-Slot4 The PCI IDE card located on PCI slot 4 The PCI IDE card connects its IRQ to ISA bus through a paddle card...
  • Page 46 Maximum transfer rate PIO Mode 0 3.3 MB/sec PIO Mode 1 5.2 MB/sec PIO Mode 2 8.3 MB/sec PIO Mode 3 11 MB/sec PIO Mode 4 16.6 MB/sec Options Description Auto (*) The BIOS negotiates with device automatically Mode 0 Use Mode 0 timing to access device Mode 1 Use Mode 1 timing to access device...
  • Page 47 3.8.7 Onboard Serial Port 1 / 2 These fields configure the onboard serial ports. There are several port address and IRQ channels that can be selected. Options Description 3F8 / IRQ 4 Port address 3F8h, IRQ 4 2F8 / IRQ 3 Port address 2F8h, IRQ 3 3E8 / IRQ 4 Port address 3E8h, IRQ 4...
  • Page 48: Load Setup Defaults

    3.8.10 Onboard PCI SCSI Chip This field configures the onboard SCSI BIOS. When disabled, the system will skip the SCSI BIOS initialization, but you can still use the SCSI channels by using the device drivers. Options Enabled (*) Disabled 3.9 LOAD SETUP DEFAULTS This setup page is used for loading the manufacturer default values.
  • Page 49 Chapter 4 SCSI BIOS Setup 4.1 Introduction The motherboard has an configuration utility, SCSISelect, which allows you to change SCSI controller settings. SCSISelect also includes SCSI utilities that let you list the SCSI IDs of devices, format SCSI disk drives, and check them for defects. 4.1.1 Enter SCSISelect utility To enter the SCSISelect utility, boot the computer and press <Ctrl><A>...
  • Page 50 4.2.2 SCSI Parity Checking SCSI parity checking is a procedure used by the channel to verify the accuracy of data transfer on the SCSI bus. By default, parity checking is enabled on all channels. Disable parity checking for a channel if any SCSI device on the channel does not support SCSI parity. Options Enabled (*) Disabled...
  • Page 51 4.2.5 SCSI Device Configuration Press <Enter> to bring up SCSI Device Configuration menu. 4.2.5.1 Initiate Sync Negotiation Synchronous negotiation is a SCSI feature that allows the SCSI channel and its attached SCSI devices to transfer data in synchronous mode. Synchronous data transfer is faster than asynchronous data transfer.
  • Page 52 4.2.5.6 BIOS Multiple LUN Support When enabling, the SCSI BIOS support multiple LUN on a SCSI device. Otherwise, the SCSI BIOS can recognize LUN 0 only. Options no (*) 4.2.5.7 Include in BIOS Scan This field specifies whether the SCSI BIOS supports devices attached to the SCSI bus without the need for device driver software.
  • Page 53 4.2.6.3 Extended BIOS Translation for DOS Drives > 1 GByte Most versions of MS-DOS are limited to 1024 cylinders per drive. The standard translation scheme for SCSI host adapter, using 64 heads and 32 sectors, provides a maximum accessible capacity of 1 Gbytes. To support disk drives larger than 1 Gbyte, the SCSI BIOS includes an extended translation scheme.
  • Page 54 4.2.6.6 Display <Ctrl><A> Message During BIOS Initialization This field turns on or off the “Press <Ctrl><A> for SCSISelect ™ Utility !” prompt at boot. Options Enabled (*) Disabled 4.2.6.7 BIOS Support for Bootable CD-ROM When enabled, the SCSI controller supports booting from a CD-ROM drive. Options Enabled (*) Disabled...

Table of Contents