Figure 2-13. I/O And Logic Board/Duty Cycle Driver Board Interconnection Diagram; Figure 2-14. H-Bridge Board/Duty Cycle Driver Board Interconnection Diagram - Hologic QDR 4500 Technical Manual

Figure 2-13. I/O and Logic Board/Duty Cycle Driver Board
Table 2-18. I/O and Logic Board/Duty Cycle Driver Board
Interconnection Descriptions
Signal
kVREF+ Pulse Amplitude reference
kVREF-
kVCHK Sense amplifier output signal.
78.125KHZ+ Duty cycle Driver clock.
78.125KHz-
XREN+ X-Ray enabling gate.
XREN-
+15V_(P) Provides power for the Duty Cycle Driver board.
AGND_(P)
-15V_(P)
H-BRIDGE
Figure 2-14. H-Bridge Board/Duty Cycle Driver Board Interconnection
Table 2-19. H-Bridge Board/Duty Cycle Driver Board Interconnection
Descriptions
Signal
VAF Pulse amplitude feedback pulse.
VBF
PRIM+ High Voltage Transformer drive pulse.
PRIM-
Section 2 - Functional Description
KVREF+, KVREF-
KV_CHK
78.125KHz+, 78.125khz-
I/O
XREN+, XREN-
and
+15V_(P)
LOGIC
AGND_(P)
BOARD
-15V_(P)
Interconnection Diagram
Description
BOARD
Diagram
Description
DUTY CYCLE
DRIVER
BOARD
JP4-2
JP4-3
JP4-4
JP4-5
JP4-6
JP4-7
JP4-8
JP4-10, JP4-11
JP4-12, JP4-13
JP4-14, JP4-15
VAF
DUTY CYCLE
VBF
DRIVER
PRIM+
BOARD
PRIM-
IOL DCD
Pins Pins
JP1-2
JP1-3
JP1-4
JP1-5
JP1-6
JP1-7
JP1-8
JP1-10, JP1-11
JP1-12, JP1-13
JP1-14, JP1-15
H-B DCD
Pins Pins
JP3-1 JP2-1
JP3-3 JP2-3
WP1, WP2 JP4-1, JP4-2
WP3, WP4 JP4-3, JP4-4
2-25