Power supplies of the STM32F05xxx family
It works in three different modes depending on the application modes:
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Run mode: the regulator supplies full power to the 1.8 V domain (core, memories and
digital peripherals)
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Stop mode: the regulator supplies low power to the 1.8 V domain, preserving the
contents of the registers and SRAM
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Standby mode: the regulator is powered off. The contents of the registers and SRAM
are lost except for the Standby circuitry and the Backup domain. This includes the
following features which can be selected by programming individual control bits:
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Independent watchdog (IWDG): the IWDG is started by writing to its Key register
or by a hardware option. Once started it cannot be stopped except by a reset.
Real-time clock (RTC): configured by the RTCEN bit in the Backup domain control
register (RCC_BDCR).
Internal low speed oscillator (LSI): configured by the LSION bit in the
Control/status register (RCC_CSR).
External 32.768 kHz oscillator (LSE): configured by the LSEON bit in the Backup
domain control register (RCC_BDCR).
Doc ID 023035 Rev 2
AN4080
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