ST STM32F756VG 32-bit Microcontrollers Manuals

Manuals and User Guides for ST STM32F756VG 32-bit Microcontrollers. We have 1 ST STM32F756VG 32-bit Microcontrollers manual available for free PDF download: Getting Started

ST STM32F756VG Getting Started (45 pages)

Brand: ST | Category: Microcontrollers | Size: 1 MB

Table of Contents
2
Power Supplies
7
Introduction
7
Independent A/D Converter Supply and Reference Voltage
7
Independent USB Transceivers Supply
7
Battery Backup Domain
8
Figure 1. VDDUSB Connected to VDD Power Supply
8
Figure 2. VDDUSB Connected to External Power Supply
8
Voltage Regulator
9
Power Supply Scheme
9
Figure 3. Power Supply Scheme
10
Reset & Power Supply Supervisor
11
Power-On Reset (Por)/Power-Down Reset (PDR)
11
Programmable Voltage Detector (PVD)
11
Figure 4. Power on Reset/Power down Reset Waveform
11
System Reset
12
Figure 5. PVD Threshold
12
Internal Reset on
13
Internal Reset off
13
Figure 6. Reset Circuit
13
Figure 7. Power Supply Supervisor Interconnection with Internal Reset off
13
Regulator off Mode
14
Figure 8. NRST Circuitry Timing Example for Stm32F74Xxx/Stm32F75Xxx
14
Figure 9. BYPASS_REG Supervisor Reset Connection
15
Regulator ON/OFF and Internal Reset ON/OFF Availability
16
Table 2. Regulator ON/OFF and Internal Reset ON/OFF Availability
16
Alternate Function Mapping to Pins
17
Figure 10. Stm32Cubemx Example Screen-Shot
17
Clocks
18
HSE OSC Clock
18
External User Clock (HSE Bypass)
18
Figure 11. HSE External Clock
18
Figure 12. HSE Crystal/Ceramic Resonators
18
External Crystal/Ceramic Resonator (HSE Crystal)
19
LSE OSC Clock
19
Figure 13. LSE External Clock
19
Figure 14. LSE Crystal/Ceramic Resonators
19
External Clock (LSE Bypass)
20
External Crystal/Ceramic Resonator (LSE Crystal)
20
Clock Security System (CSS)
20
Boot Configuration
21
Boot Mode Selection
21
Table 3. Boot Modes
21
Boot Pin Connection
22
System Bootloader Mode
22
Table 4. Stm32F74Xxx/Stm32F75Xxx Bootloader Communication Peripherals
22
Figure 15. Boot Mode Selection Implementation Example
22
Debug Management
23
Introduction
23
SWJ Debug Port (Serial Wire and JTAG)
23
Pinout and Debug Port Pins
23
Figure 16. Host to Board Connection
23
SWJ Debug Port Pins
24
Flexible SWJ-DP Pin Assignment
24
Table 5. SWJ Debug Port Pins
24
Table 6. Flexible SWJ-DP Assignment
24
Internal Pull-Up and Pull-Down on JTAG Pins
25
SWJ Debug Port Connection with Standard JTAG Connector
25
Figure 17. JTAG Connector Implementation
25
Recommendations
26
Printed Circuit Board
26
Component Position
26
Ground and Power Supply (VSS,VDD)
26
Decoupling
26
Other Signals
27
Unused I/Os and Features
27
Figure 18. Typical Layout for VDD/VSS Pair
27
Reference Design
28
Description
28
Clocks
28
Reset
28
Boot Mode
28
SWJ Interface
28
Power Supply
28
Component References
29
Table 7. Mandatory Components
29
Table 8. Optional Components
29
Figure 19. STM32F756NGH6 Reference Schematic
30
Table 9. Reference Connection for All Packages
31
Recommended PCB Routing Guidelines for Stm32F745Xx/Stm32F756Xx Devices
34
PCB Stack-Up
34
Figure 20. Four Layer PCB Stack-Up Example
34
Crystal Oscillator
35
Power Supply Decoupling
35
Figure 21. Six Layer PCB Stack-Up Example
35
High Speed Signal Layout
36
SDMMC Bus Interface
36
Figure 22. Example of Bypass Cap Placed Underneath the Stm32F74Xxx/Stm32F75Xxx
36
Flexible Memory Controller (FMC) Interface
37
Quadrature Serial Parallel Interface (Quad SPI)
38
Embedded Trace Macrocell (ETM)
39
Package Layout Recommendation
39
BGA 216 0.8 MM Pitch Design Example
39
Table 10. BGA 216 0.8 MM Pitch Package Information
39
Figure 23. BGA 0.8Mm Pitch Example of Fan-Out
40
Figure 24. Via Fan-Out
40
Figure 25. FMC Signal Fan-Out Routing Example
40
Table 11. Wafer Level Chip Scale Package Information
41
Figure 26. 143-Bumps WLCSP, 0.40 MM Pitch Routing Example
42
Table 1. Applicable Products
44
Table 12. Document Revision History
44

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