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TSW12D1620 Evaluation module
User's Guide
Literature Number: SBAU323A
January 2019 – Revised January 2019

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Summary of Contents for Texas Instruments TSW12D1620

  • Page 1 TSW12D1620 Evaluation module User's Guide Literature Number: SBAU323A January 2019 – Revised January 2019...
  • Page 2: Table Of Contents

    Control Tab ..................3.1.4 Input Sampling / LVDS Tab ....................3.1.5 Low Level View Tab ............... Troubleshooting the TSW12D1620EVM-CVAL .......................... Revision History Contents SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 3 Configuration GUI: Input Sampling / LVDS Tab ................3-6. Configuration GUI: Low-Level View Tab List of Tables ......................3-1. Low-Level Controls ......................A-1. Troubleshooting SBAU323A – January 2019 – Revised January 2019 List of Figures Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 4: Preface

    (back of board) Figure 1. TSW12D1620 Evaluation Module The TSW12D1620 evaluation module (EVM) is used to evaluate the ADC12D1620QML-SP analog-to- digital converter (ADC) from Texas Instruments. Throughout this document, the terms evaluation board, evaluation module, and EVM are synonymous with the TSW12D1620EVM-CVAL.
  • Page 5 Rohde & Schwarz is a registered trademark of Rohde & Schwarz GmbH & Co.. Trilithic is a trademark of Trilithic, Inc.. All other trademarks are the property of their respective owners. SBAU323A – January 2019 – Revised January 2019 Introduction Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 6: Equipment

    (Ext ADC Clock) (Differential Inputs) 5-V DC Power Connector AINQ AINI (Single-Ended Input) (Single-Ended Input) Data Connector (Bottom) Figure 1-1. EVM Feature Locations Equipment SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 7: Required Equipment

    • A band-pass filter for the DEVCLK input. TI recommends a filter similar to the analog input path filter. SBAU323A – January 2019 – Revised January 2019 Equipment Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 8: Setup Procedure

    NOTE: The HSDC Pro software must be installed before connecting the TSW12D1620EVM-CVAL and TSW14DL3200EVM to the PC for the first time. Setup Procedure SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 9: Install The High-Speed Data Converter (Hsdc) Pro Software

    For example, if the filter insertion loss is 2 dB, the signal generator must be set to 9 dBm + 2 dB = 11 dBm. SBAU323A – January 2019 – Revised January 2019 Setup Procedure Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 10: Connect The Signal Generators To The Evm (Rf Outputs Disabled Until Further Directed)

    2.10 Turn On the Signal Generator RF Outputs Turn on the RF signal output of the signal generator connected to VIN. Setup Procedure SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 11: Open The Tsw12D1620Evm-Cval Gui And Program The Adc And Clocks

    3. Select Fclk = 1600 MHz as the external Fclk selection. 4. Select nonDES operating mode. 5. Click Program Clocks and ADC. This action overwrites any previous device register settings. SBAU323A – January 2019 – Revised January 2019 Setup Procedure Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 12: Calibrate The Adc Device On The Evm

    ADC, or after exiting the power-down mode. See the ADC12D1620QML-SP device data sheet for details regarding the necessary calibration sequence. Setup Procedure SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 13: Open The Hsdc Software And Load The Fpga Image To The Tsw14Dl3200Evm

    7. Proceed to capture data; see Section 2.14. SBAU323A – January 2019 – Revised January 2019 Setup Procedure Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 14: Capture Data Using The Hsdc Pro Software

    Check for Coherent Freq. Auto-Calculate Select Size of Analysis Window Enter ADC Output Sample Rate Enter Target ADC Input Frequency Figure 2-4. HSDC Pro GUI Setup Procedure SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 15: Device Configuration

    3-1) is used to simplify initial configuration of the EVM. When the desired settings are chosen, clicking the Program Clocks and ADC button configures the EVM for use. Figure 3-1. Configuration GUI: EVM Tab SBAU323A – January 2019 – Revised January 2019 Device Configuration Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 16: Configuration Gui: Status Log Panel

    Save Selected. Figure 3-2 shows the status log panel. Figure 3-2. Configuration GUI: Status Log Panel Device Configuration SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 17: Temperature Tab

    Read Temperature from MSP430: If enabled in hardware or firmware, this method uses the MSP430 to read the TMP461 using I C and the LMT01 devices using the pulse count interface. SBAU323A – January 2019 – Revised January 2019 Device Configuration Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 18: Control Tab

    DES Timing Adjust: DES timing adjust • Aperture Delay Adjust: aperture delay coarse adjust, aperture delay fine adjust • AutoSync/DCLK Reset: AutoSync Device Configuration SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 19: Input Sampling / Lvds Tab

    See the ADC12D1620QML-SP data sheet for information on the specific registers used. The following list summarizes the registers used. • Sampling Mode Settings: configuration register 1, AutoSync • LVDS Interface Control: configuration register 1 SBAU323A – January 2019 – Revised January 2019 Device Configuration Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 20: Low Level View Tab

    Perform a generic read or write command to the device shown in the Block drop-down menu using read or write register buttons the address and write data information. Device Configuration SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 21: A Troubleshooting The Tsw12D1620Evm-Cval

    • Verify that band-pass filters are used in the clock and input signal paths and that low-noise signal sources are used. SBAU323A – January 2019 – Revised January 2019 Troubleshooting the TSW12D1620EVM-CVAL Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 22: Revision History

    Changes from Original (January 2019) to A Revision ....................Page ........• Changed TSW12D1620 Evaluation Module figure to show MSP430FR5969-SP placement Revision History SBAU323A – January 2019 – Revised January 2019 Submit Documentation Feedback Copyright © 2019, Texas Instruments Incorporated...
  • Page 23 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...

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