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4
4.2.2 Control Signal Input Port
Control Signal interface
Name
HIGH-SPEED SIGNAL: Pulse rising edge is effective, PL highlevel 5 ~ 24
PL+
VDC,
PL-
Low Level 0 ~ 0.5 v. In order to respond reliably to the pulse signal, the
pulse width should be greater than 1.5 s.
DR+
HIGH-SPEED SIGNAL: Pulse rising edge is effective, PL highlevel 5 ~ 24
VDC,
Low Level 0 ~ 0.5 v. In order to respond reliably to the pulse signal, the
DR-
pulse width should be greater than 1.5 s.
Low speed signal: IN1, IN2, IN3 common anode input, level 5-24V compatible
IN+
Negative input of low speed signal IN1
IN1
Negative input of low speed signal IN2
IN2
Negative input of low speed signal IN3
IN3
Common Cathode OC emitter output,OT1,OT2 emitter OC output common terminal
OT-
OT1 emitter output, maximum pull-up voltage 24VDC, pull-up resistance 2K,
maximum output current 100mA
OT1
OT2 emitter output, maximum pull-up voltage 24VDC, pull-up resistance 2K,
maximum output current 100mA
OT2
Reserve
10V
Reserve
AIN2
Over-tolerance alarm
Function
8
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