Bgma Interface; Clock Settings; Buzzer Module - Fujitsu MB95200H Series Setup Manual

3.4.2 BGMA Interface

To start the debug using a BGMA, users shall connect IDC10 socket from the BGMA to CN1
on an EV-board, and J2 shall be open in a debug mode. In a normal (free-run) mode, J2
shall be closed to enable reset key S3. Refer to Figure 3.4.2-1.
MCU Mode
Debug mode
User mode

3.4.3 Clock Settings

The MB95200H/210H series MCU uses an internal main RC as a clock source by default.
Users can select on-board crystal as a main clock and a sub-clock. Follow the settings below:
Clock
Main clock
Sub-clock

3.4.4 Buzzer Module

A buzzer module is provided to demonstrate an 8/16 composite timer output (a continuous
mode). To enable buzzer module, follow the table below:
Modules
Buzzer:
BUZ1
Starter Kit MB2146-410-01-E Setup Guide V1.1
Chapter 3 EV-board Manual
Figure 3.4.2-1 Debug Interface
Header name
J2
J2
Header name
SW3: X1, X0
SW3: X1A, X0A
Table 3.4.3-1
Header name
SW1: BUZ.
Table 3.4.4-1
MCU-UM-500002-E-11 – Page 12
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