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Schematic Diagrams
Power V-Core 1
VCORE_1
Sheet 43 of 55
Power V-Core 1
5
5
5
5
VC ORE_VSS_SENSE
5
VC ORE_VCC_SEN SE
12,23, 37
B - 44 Power V-Core 1
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1.05VS
PUT COLSE
TO CPU
SOCKET
PR 200
75_04
PR205
H_PROC HOT#
VGF X_CORE
3,45
H_PROC HOT#
100_04
6
VR1_VCCGT_SEN SEA
6
VR1_VSSGT_SENSEA
PR204
3.3VS
100_04
PR 59
10K_04
1.05VS
VR_RDYA
PR69
PR74
PR75
130_1%_04
54.9_1%_04
PJ 14 *6mil
1
H _CPU_SVIDDAT
H _CPU_SVIDDAT
H _CPU_SVIDALR T#
H _CPU_SVIDALR T#
PR179
APGND
H _CPU_SVIDCLK
H _CPU_SVIDCLK
PR180
APGND
PR56
V IN
3.3VS
PUT COLSE
0.01u_50V_X7R_04
TO CPU
SOCKET
PR194
10K_04
PR206
23
DELAY_PWRGD
100_04
PR57
*10mil_short
PR58
*10mil_short
PR207
VCORE
100_04
PR 61
PR 51
PR 54
PC37
3.3VS
49.9_1%_04
10_1%_04
680p_50V_X7R_04
10K_04
PR68
TR BST#
PR 49
1.21K_1%_04
PJ1
PC 38
*6mil
4700p_50V_X7R_04
PR66
*10mil_short
VR_EN
APGN D
ALL_SY S_PWRGD
PR 34
PC 20
C SCOMP
DROOP
C SREF
2.43K_1%_04
1000p_50V_X7R_04
PC 126
0.1u_10V_X7R_04
APGN D
PR 157
24.3k_1%_04
APGN D
PR48
PR55
PC39
PC28
10p_50V_NPO_04
165K_1%_04
10_1%_04
33p_50V_NPO_04
PR46
PC 27
PR50
1K_1%_04
4.3K_1%_04
2200p_50V_X7R_04
PR 25
60.4K_1%_06
SWN1A
5VS
APGND
PR 64
*10mil_short
PC 123
PC40
1000p_50V_X7R_04
PR 65
*10mil_short
1000p_50V_X7R_04
CSREFA
C SREFA 44
PC117
0.1u_10V_X7R_04
PR169
*10mil_short
APGND
PR16
PR185
2_06
5VS
1
45
PC131
2.2u_6.3V_X5R_04
APGND
VC C
PWMA
2
44
VD DBP
BSTA
VR_R DYA
3
PU1
43
VR DYA
H GA
4
42
VR_EN
NCP6132AMNR26
EN
SWA
H_CPU_SVIDDAT
5
41
SD IO
LGA
2
H_CPU_SVIDALRT#
6
40
7
ALERT#
BST2
39
H_CPU_SVIDCLK
SC LK
H G2
VBOOT
8
38
10K_04
VBOOT
SW2
90.9K_1%_04
9
37
ROSC
LG2
1K_04
10
36
VR MP
PVCC
11
35
H_PR OCHOT#
VR HOT#
PGND
DELAY_PW RGD
12
34
VR DY
LG1
13
33
14
VSN
SW1
32
PC132
VSP
H G1
15
31
PR 7
DIF F
BST1
APGND
PR15 47K_1%_04
VSN
PC36
1000p_50V_X7R _04
VSP
PC121
0.1u_10V_X7R_04
C SP1
PC32
C SP2
1K_1%_04
C SP3
33p_50V_NPO_04
PC41
PR45
PC30
C SREF
CSREF
44
100p_50V_NPO_04
4.12K_1%_06
4700p_50V_X7R_04
PC125
PR52
10.7K_1%_04
1000p_50V_X7R _04
CSSUM
APGN D
PR159
PC127
PC22
1000p_50V_X7R_04
PC26
680p_50V_X7R_04
PR 196
PR33
APGND
APGND
75K_1%_04
165K_1%_04
RT6
2
1
PUT COLSE
TO VCORE
100K_N TC_06_A
Phase 1
3,9,10,11,12,21,22,23,24, 25,26,27,28,30,31,33,34,35,36,37,38,45
Inductor
RT5
PUT COLSE
TO GT
PC 25
CSCOMPA
DROOPA
Inductor
PR44
1.65K_1%_06
1000p_50V_X7R_04
TSENSEA
44
PR152
CSREFA
PC 122
0.047u_10V_X7R _04
APGND
CSP1A
PR147
6.98K_1%_04
SWN1A
44
19.6K_1%_04
PUT COLSE
TO VGFX
HOT SPOT
PR12
PC11
0.22u_10V_X5R_04
5VS
2_06
HG1A
44
SW 1A
44
LG1A
44
PR4
PC8
0.22u_10V_X5R _04
2_06
HG2
44
SW 2
44
PR19
LG2
44
PC114
2.2u_6.3V_X5R_04
*0_04
LG1
44
5VS
CSP1A
SW1
44
HG1
44
CSP2A
PC 10
0.22u_10V_X5R_04
2_06
5VS
Option for
2 phase
CPU
CSP1
PR18
SW N1
44
6.98K_1%_04
PC119
APGND
C SREF
0.047u_10V_X7R_04
CSP2
PR20
SW N2
44
6.98K_1%_04
PC120
C SREF
0.047u_10V_X7R_04
PR24
127K_1%_06
SWN1
44
PR29
127K_1%_06
SWN2
44
6, 44
VGFX_CORE
5,44
VC ORE
6,21,22,27,28,38,41,42
1.05VS
12,38,39,40,41,42,44,45,46
VI N
12,21,27,28,30,31,34,35,36,38,45
5VS
3.3VS
CSR EFA
RT4
Option for
PR22
1 phase
GT
0_04
TSENSE
PR21
PR150
RT3
*10mil_short
CSP3
PUT COLSE
TO VCORE
HOT SPOT
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