Dual Ported Ram Interface; Signal Description; Memory Map - HMS AnyBus DataTransfer Design Manual

4 Dual Ported RAM Interface

The easiest method to use the data transfer module is to integrate it into the system microprocessor bus.
This is achieved by using the DPRAM interface. Through this interface the handshaking protocol and the
access to all the relevant data is made.

4.1 Signal Description

The ANYBUS module is accessed through the application connector. This connector includes the power
supply, address and data bus and control signals for the DPRAM.
To achieve compatibility for future AnyBus products, please see chapter 3.1 before implementing.
For electrical characteristics, please see section 7 and Appendix C

4.2 Memory Map

After reset or power up of the DataTransfer module the following default memory mapping can be found.
The lowest 480 Bytes (000h - 1DFh) are dedicated to the input area and the following 480 Bytes (1E0h -
3BFh) are dedicated to the output area. The remaining 64 Bytes are divided into two 32 bytes areas. The
first area is used for fieldbus specific data and the last area is taken by different control registers.
The four different areas is mapped on the memory according the following:
Address
000h - 03Fh
040h - 1DFh
1E0h - 21Fh
220h - 3BFh
3C0h - 3DFh
3E0h - 3FFh
Using the input- and output- length register for I/O data (3F8h - 3Fbh) makes it possible to change the size
of the input and output area within the 480 supported bytes.
Name
Input data
(64 bytes)
Free
(416 bytes)
Output data
(64 bytes)
Free
(416 bytes)
Fieldbus specific data
(32 bytes)
Control register
(32 bytes)
HMS F
Description
Default no. of input bytes that can be addressed by all
supported fieldbus systems.
Area of free bytes that can be assigned to input data
Default no. of output bytes that can be addressed by all
supported fieldbus systems.
Area of free bytes that can be assigned to output data
S AB
IELDBUS YSTEMS
Design Guide
Revision 1.12
1998-08-12
Page 12 (35)