Texas Instruments TPS7H1101SPEVM User Manual

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User's Guide
TPS7H1101SPEVM User's Guide
1 Introduction.............................................................................................................................................................................2
1.1 Related Documentation......................................................................................................................................................2
2 Description..............................................................................................................................................................................
3 Test Setup................................................................................................................................................................................3
3.1 Equipment..........................................................................................................................................................................
3.2 Bench Test Setup Conditions.............................................................................................................................................
3.3 Power-Up Procedure..........................................................................................................................................................4
4 Board Layout.........................................................................................................................................................................
4.1 EVM Layout Flexibility......................................................................................................................................................
5 Schematic and Bill of Materials...........................................................................................................................................17
Revision History.......................................................................................................................................................................20
Figure 3-1. Headers Description and Jumper
Figure 3-2. IOUT (A) vs IPCL
Figure 3-3. IOUT (A) vs IPCL (A) across CSR range..................................................................................................................
Figure 3-4. VCS (V) vs IOUT (A).................................................................................................................................................
Figure 3-5. IOUT (A) vs ICS
Figure 3-6. VDO vs IOUT ............................................................................................................................................................7
Figure 3-7. Load Transient Response: Step Load 0.1 A to 1.6 mA.............................................................................................
Figure 3-8. Expanded View Overshoot........................................................................................................................................
Figure 3-9. Expanded View Undershoot......................................................................................................................................
Figure 3-10. Current Sharing LDO_1 and LDO_2.......................................................................................................................
Figure 3-11. Disabling the LDO via Soft-Start
Figure 3-12. Turn-Off.................................................................................................................................................................
Figure 4-1. Component Placement (Top
Figure 4-2. Component Placement (Bottom
Figure 4-3. PCB Layout (Top Layer)..........................................................................................................................................
Figure 4-4. Board Layout - Second Layer (Mid Layer 1)...........................................................................................................
Figure 4-5. Board Layout - Third Layer (Mid Layer 2)...............................................................................................................
Figure 4-6. Board Layout - Fourth Layer (Bottom
Figure 5-1. TPS7H1101SPEVM
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SLVU944B - OCTOBER 2015 - REVISED OCTOBER 2020
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Table of Contents

List of Figures
Placement............................................................................................................3
(uA)...............................................................................................................................................5
(A)...................................................................................................................................................6
Pin......................................................................................................................10
Side)...........................................................................................................................11
Side).....................................................................................................................12
Layer)...........................................................................................................16
Schematic...............................................................................................................................17
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TPS7H1101SPEVM User's Guide
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