Siemens SINUMERIK 840D sl OP 010 Manual page 29

Table 1-13
Connector
LVDS display interface channel 2
Used for expanding the LVDS display interface channel 1 to control TFT displays with 1280 x
1024 pixels (SXGA).
Associated interface cable:
Connector type:
Table 1-14
Operator panel front: OP 010
Manual, 07/2018, A5E36371538B
Allocation of the LVDS display interface
Pin Name
1/2 P5V_D_fused
3 RXIN0-
4 RXIN0+
5/6 P3V3_D_fused
7 RXIN1-
8 RXIN1+
9/10 GND
11 RXIN2-
12 RXIN2+
13/14 GND
15 RXCLKIN-
16 RXCLKIN+
17/18 GND
19/20 N.C.
Allocation of the LVDS display interface
Connector Pin
1/2
3
4
5/6
7
8
9/10
11
12
13/14
15
16
17
18-20
Type Meaning
VO +5 V display supply voltage (fused in PCU/
TCU)
I LVDS input signal
VO +3.3 V display supply voltage (fused in PCU/
TCU)
I LVDS input signal
- System ground (reference potential)
I LVDS input signal
- System ground (reference potential)
O LVDS cycle clock signal
System ground (reference potential)
-
Not connected
K3
2 x 10-pin socket connector
Name Type
GND -
RXIN10-
I
RXIN10+
GND -
RXIN1-
I
RXIN1+
GND -
RXIN2-
I
RXIN2+
GND V
RXCLKIN-
O
RXCLKIN+
GND V
P12VF VO
General information and networking
1.3 Connecting
Meaning
System ground (reference potential)
LVDS input signal Bit 0 (-)
Bit 0 (+)
System ground (reference potential)
LVDS input signal Bit 1 (-)
Bit 1 (+)
System ground (reference potential)
LVDS input signal Bit 2 (-)
Bit 2 (+)
Ground
LVDS cycle clock sig‐ (-)
nal
(+)
Ground
+12 V fused
Bit 0 (-)
Bit 0 (+)
Bit 1 (-)
Bit 1 (+)
Bit 2 (-)
Bit 2 (+)
(-)
(+)
29