Testing The Synchrocheck - ABB Relion 650 Series Commissioning Manual

1MRK 511 209-UEN -
5.7.1.2
REC650
Commissioning Manual
The voltage inputs used are:
ULine UL1, UL2 or UL3voltage inputs on the IED
U-Bus U-Bus voltage input on the IED
Testing the frequency difference
The frequency difference is in the example set at 0.20 Hz on the local HMI, and the
test should verify that operation is achieved when the FreqDiffMax frequency
difference is lower than 0.20 Hz. The test procedure below will depend on the
settings used.
Procedure:
1. Apply voltages U-Line = 100% UBase, f-line=50.0 Hz and U-Bus = 100%
UBase, f-bus = 50.2 Hz.
2. Check that a closing pulse is submitted and at closing angle less than 2
degrees from phase equality. Modern test sets will evaluate this automatically.
3. Repeat with U-Bus = 80% UBase, f-bus=50.25 Hz to verify that the function
does not operate when freqency difference is above limit.
4. Repeat with different frequency differences for example, 100 mH with f-bus
nominal and line leading and for example 20 mHz (or just above
FreqDiffMin) to verify that independent of frequency difference the closing
pulse occurs within 2 degrees.
5. Verify that the closing command is not issued when the frequency difference
is less than the set value FreqDiffMin.

Testing the synchrocheck

During test of the synchrocheck function for a single bay arrangement, these
voltage inputs are used:
U-Line UL1, UL2 or UL3 voltage input on the IED
U-Bus U-Bus voltage input on the IED
Testing the voltage difference
Set the voltage difference at 15% UBase on the HMI, and the test should check that
operation is achieved when the voltage difference UDiff is lower than 15% UBase.
The settings used in the test shall be final settings. The test shall be adapted to site
setting values instead of values in the example below.
Test with no voltage difference between the inputs.
Test with a voltage difference higher than the set UDiffSC
Section 5
Testing functionality
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