Table Of Contents - DTK PAM-0035S User Manual

CONTENTS
CHAPTER 1 INTRODUCTION
1.1 KEY FEATURES
1.2 MAINBOARD COMPONENTS
1.3 PCI LOCAL BUS SPECIAL FEATURES
CHAPTER 2 HARDWARE CONFIGURATION
2.1 JUMPER AND MEMORY BANK LOCATIONS
2.2 JP01 - CPU TYPE SELECTION
2.3 S0-S2, JP0 - CPU CLOCK SELECTION
2.4 CPU INSTALLATION
2.5 CACHE CONFIGURATION
2.5.1
2.5.2
2.5.3
2.5.4
2.5.5
2.6 JP4 - CACHE INVALIDATION INPUT FOR CPU
2.7 JP5 - CPU PIPELINE MODE SELECTION
2.8 JP6 - CPU INTERNAL CACHE WRITE BACK/WRITE
THROUGH SELECTION
2.9 JP12 - VIDEO SELECTION
2.10 JP1 - DISCHARGE CMOS RAM
2.11 JP2, JP3 - EPROM TYPE SELECTION
2.12 JP18 - PARALLEL PORT IRQ SELECTION
2.13 JP22, JP23 - PARALLEL PORT SETTING AND ECP DMA
SELECTION
2.14 MEMORY INSTALLATION
2.14.1
UPGRADING CACHE
CACHE SIZE AND MEMORY LOCATIONS
CACHE CHIP SOCKETS AND JUMPER
LOCATIONS
JP7-JP9 - CACHE JUMPER SETTING
INSTALLING CACHE CHIPS
INSTALLING SIMM
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