IDT EB-LOGAN-23 Manual
  1. Manuals
  2. Brands
  3. IDT Manuals
  4. Motherboard
  5. EB-LOGAN-23
  6. Manual

IDT EB-LOGAN-23 Manual

Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
®
IDT
EB-LOGAN-23
™
Evaluation Board Manual
(Evaluation Board: 18-691-000)
February 2011
6024 Silver Creek Valley Road, San Jose, California 95138
Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775
Printed in U.S.A.
©2011 Integrated Device Technology, Inc.

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the EB-LOGAN-23 and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for IDT EB-LOGAN-23

Summary of Contents for IDT EB-LOGAN-23

  • Page 1 ® EB-LOGAN-23 ™ Evaluation Board Manual (Evaluation Board: 18-691-000) February 2011 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775 Printed in U.S.A. ©2011 Integrated Device Technology, Inc.
  • Page 2 Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry described herein is free from patent infringement or other rights of third parties which may result from its use.

  • Page 3: Table Of Contents

    Table of Contents ® Description of the EB-LOGAN-23 Evaluation Board Notes Introduction ............................. 1-1 Board Features ..........................1-2 Hardware ..........................1-2 Software..........................1-2 Other............................1-2 Revision History ..........................1-2 Installation of the EB-LOGAN-23 Evaluation Board EB-LOGAN-23 Installation ......................2-1 PCI Express Mezzanine and Edge Adapters.................. 2-1 Hardware Description ........................
  • Page 4 IDT Table of Contents Notes EB-LOGAN-23 Evaluation Board February 16, 2011...
  • Page 5 List of Figures ® Figure 1.1 Function Block Diagram of the EB-LOGAN-23 Evaluation Board ........1-1 Notes Figure 2.1 Bifurcated and Merged Mezzanine Cards ................2-1 Figure 2.2 MiniSAS Mezzanine Adapter ....................2-2 Figure 2.3 EB-LOGAN-23 iSAS-to-SATA Breakout Cable ..............2-2 Figure 2.4 EB-LOGAN-23 iSAS-to-iSAS Cable ..................2-2 Figure 2.5...
  • Page 6 IDT List of Figures Notes EB-LOGAN-23 Evaluation Board February 16, 2011...
  • Page 7 List of Tables ® Table 2.1 EB-LOGAN-23 Global Clock Select ..................2-5 Notes Table 2.2 Clock Buffer Input Sources ....................2-6 Table 2.3 Global Reference Input Clock Frequency Select ..............2-6 Table 2.4 Onboard Clock Generator Frequency Select ..............2-6 Table 2.5 Onboard Reference Clock Generator Access Points ............
  • Page 8 IDT List of Tables Notes VB64H16AG2 Validation Board Manual February 16, 2011...

  • Page 9: Introduction

    — one connector per stack of 8 lanes. Various types of daughter cards (provided by IDT) can then be plugged into these connectors to facilitate connectivity to one x8 or two x4 or four x2 or eight x1 link partners.

  • Page 10: Board Features

    – Power on reconfiguration via optional serial EEPROM connected to the SMBUS Master interface Upstream, Downstream Ports – The EB-LOGAN-23 has a minimum of one port configured as an upstream port to be plugged into a host slot through an adaptor and a cable.
  • Page 11 IDT Description of the EB-LOGAN-23 Evaluation Board Notes February 16, 2011: Changed default settings from Off to On in Tables 2.3 and 2.4. 89EB-LOGAN-23 Evaluation Board 1 - 3 February 16, 20110...
  • Page 12 IDT Description of the EB-LOGAN-23 Evaluation Board Notes 89EB-LOGAN-23 Evaluation Board 1 - 4 February 16, 2011...

  • Page 13: Eb-Logan-23 Installation

    3. Make sure that the host system (e.g. server with root complex chipset) is powered off. 4. Connect the evaluation board to the host system via the adapter card and cable provided by IDT. 5. Apply power to the host system and to the IDT board.
  • Page 14 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Pictured in Figure 2.2 is the mini-SAS Mezzanine card which consists of two iSAS and two SATA connectors. Each iSAS connector supports up to two PCI Express x4 width and the SATA connectors are used for clock and reset signals of each x4 or less stack/port.

  • Page 15: Hardware Description

    (a feature required for enabling multiple spread spectrum clocks in the system). The EB-LOGAN-23 Main Board, shown in Figure 2.7, supports up to 6 PCI Express downstream ports and up to 23 ports when using two 12-PACK Boards.

  • Page 16: Reference Clocks

    Reference Clocks Global Reference Input Clocks The PES32NT24AG2 requires two differential reference clocks. The EB-LOGAN-23 derives these clocks from SMA connectors (J17/J20, J66/J67), clock buffer (U51), or SATA connectors (J21, J22) as described in Table 2.1 and Figures 2.9 and 2.10. Both reference clocks are mandatory. Connecting only one of them will prevent the device from functioning.
  • Page 17 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Global Jumper Selection Clock# GCLK0 [1-3 / 2-4] SMA (J66/J67) [5-7 /6-8] From Clock Buffer U51 (default) [7-9 / 8-10] SATA, J21 GCLK1 [1-3 / 2-4] SMA (J17/J20) [5-7 /6-8] From Clock Buffer U51 (default) [7-9 / 8-10] SATA, J22 Table 2.1 EB-LOGAN-23 Global Clock Select...

  • Page 18: Local Port Input Clocks

    IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Jumper Selection [1-3 / 2-4] SMA (J5/J7) [5-7 / 6-8] Onboard Clock Generator (U49) [7-9 / 8-10] SATA (J8) (default) Table 2.2 Clock Buffer Input Sources The frequency of the global reference clock input may be selected by the Clock Frequency Select (GCLKFEL) pin to be either 100 MHz or 125 MHz as described in Table 2.3.

  • Page 19: Table 2.6 Eb-Logan-23 Port Clock Select

    [3-5 / 4-6] From Clock Buffer (U51) (default) [7-9 / 8-10] To P06CLK Clock Header (J12) [9-11 / 10-12] SATA (J30) Table 2.7 EB-LOGAN-23 Slot Clock Select (Part 1 of 2) 89EB-LOGAN-23 Evaluation Board 2 - 7 February 16, 2011...

  • Page 20: Clkmode Selection

    [3-5 / 4-6] From Clock Buffer (U51) (default) [7-9 / 8-10] To P20CLK Clock Header (J16) [9-11 / 10-12] SATA (J34) Table 2.7 EB-LOGAN-23 Slot Clock Select (Part 2 of 2) CLKMODE Selection All ports in the PES32NT24AG2 device (upstream and downstream) use global clocked mode by default.

  • Page 21: Pci Express Analog Power Voltage Regulator

    IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Signal Signal +3.3V +3.3V +3.3V -12V PS_ON PWR_OK 5VSB +12V3 +12V3 +3.3V Table 2.9 EPS12V 24-pin Power Connector - J6 Signal Signal +12V1 +12V1 +12V2 +12V2 Table 2.10 EPS12V 8-Pin Connector - J5 The power switch located at S1 can be used to control the supply power from the external power supply connector.

  • Page 22: Power-Up Sequence For Pes32Nt24Ag2

    Heatsink Requirement The EB-LOGAN-23 evaluation board utilizes a heatsink with integrated fan. All initial shipments of the board are made with the heatsink whether or not one is truly required. There may be low link usage applica- tions within which the heatsink may, in fact, not be required.

  • Page 23: Boot Configuration Vector

    IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Ports Associated with the Stack Stack Stack 0 0, 1, 2, 3 Stack 1 4, 5, 6, 7 Stack 2 8, 9, 10, 11, 12, 13, 14, 15 Stack 3 16, 17, 18, 19, 20, 21, 22, 23 Table 2.11 Ports in Each Stack...

  • Page 24: Smbus Interfaces

    IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Signal Default S5[1] SWMODE[0] S5[2] SWMODE[1] S5[3] SWMODE[2] S5[4] SWMODE[3] SW8[1] STK2CFG[0] SW8[2] STK2CFG[1] SW8[3] STK2CFG[2] SW8[4] STK2CFG[3] SW8[5] STK2CFG[4] SW8[6] STK1CFG[0] SW8[7] STK1CFG[1] SW9[1] STK3CFG[0] SW9[2] STK3CFG[1] SW9[3] STK3CFG[2] SW9[4]...

  • Page 25: Smbus Master Interface

    IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Slave SMBus Interface Connector Signal Table 2.14 Slave SMBus Interface Connector For a fixed address, the SMBus address of the PES32NT24AG2 slave interface is 0b1110111 by default and is configurable using DIP Switches SW10[5] and SW10[6] as described in Table 2.15.

  • Page 26: Miscellaneous Jumpers, Headers

    IDT Installation of the EB-LOGAN-23 Evaluation Board Notes JTAG Connector J5 Signal Direction Signal Direction /TRST - Test reset Input — TDI - Test data Input — TDO - Test data Output — TMS - Test mode select Input —...

  • Page 27: Leds

    1-2: Slot 20, +3.3V source from hot-plug controller Table 2.17 Miscellaneous Jumpers, Headers (Part 2 of 2) LEDs There are many LED indicators on the EB-LOGAN-23 which convey status feedback. A description of each is provided in Table 2.18. Location...
  • Page 28 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Color Definition DS163 Orange Port18: Attention Push Button Input DS164 Orange Port17: Attention Push Button Input DS165 Orange Port16: Attention Push Button Input DS166 Orange Port15: Attention Push Button Input DS167...
  • Page 29 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Color Definition DS200 Yellow Port5: Presence Detect Input DS201 Yellow Port4: Presence Detect Input DS202 Yellow Port3: Presence Detect Input DS203 Yellow Port2: Presence Detect Input DS204 Yellow Port1: Presence Detect Input...
  • Page 30 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Color Definition DS36 Green Port16: Power Good Input DS37 Green Port15: Power Good Input DS38 Green Port14: Power Good Input DS39 Green Port13: Power Good Input DS40 Green Port12: Power Good Input...
  • Page 31 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Color Definition DS226 Orange Port3: Attention Indicator Output DS227 Orange Port2: Attention Indicator Output DS228 Orange Port1: Attention Indicator Output DS229 Orange Port0: Attention Indicator Output DS230 Green Port23: Power Indicator Output...
  • Page 32 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Color Definition DS62 Green Port14: Power Enable Output DS63 Green Port13: Power Enable Output DS64 Green Port12: Power Enable Output DS65 Green Port11: Power Enable Output DS66 Green Port10: Power Enable Output...
  • Page 33 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Color Definition DS99 Slot 1 Reset Output DS100 Slot 0 Reset Output DS326 Partition 7 Fundamental Reset Input DS327 Partition 6 Fundamental Reset Input DS328 Partition 5 Fundamental Reset Input DS329...
  • Page 34 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Location Color Definition DS353 Green Port4: Link Up Status Output DS354 Green Port3: Link Up Status Output DS355 Green Port2: Link Up Status Output DS356 Green Port1: Link Up Status Output DS357...

  • Page 35: Pci Express Connectors

    IDT Installation of the EB-LOGAN-23 Evaluation Board PCI Express Connectors Notes Side A Side B +12V 12V power PRSNT1# Hot-Plug presence detect +12V 12V power +12V 12V power RSVD Reserved +12V 12V power Ground Ground SMCLK SMBus clock JTAG2 TCK (Test Clock) JTAG i/f clk i/p...
  • Page 36 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes Side A Side B PETn4 pair, Lane 4 Ground Ground PERp4 Receiver differential Ground PERn4 pair, Lane 4 PETp5 Transmitter differential Ground PETn5 pair, Lane 5 Ground Ground PERp5 Receiver differential Ground...

  • Page 37: Eb-Logan-23 Board Figure

    IDT Installation of the EB-LOGAN-23 Evaluation Board EB-LOGAN-23 Board Figure Notes Figure 2.11 EB32NT24AG2 Evaluation Board 89EB-LOGAN-23 Evaluation Board 2 - 25 February 16, 2011...
  • Page 38 IDT Installation of the EB-LOGAN-23 Evaluation Board Notes 89EB-LOGAN-23 Evaluation Board 2 - 26 February 16, 2011...

  • Page 39: Software For Eb-Logan-23

    PCIe parts from IDT. Once users are familiar with the GUI, they will be able to use the same GUI on all PCIe parts from IDT. This software is customized for each device through an XML device description file which includes information on the number of ports, registers, types of registers, information on bit-fields within each register, etc.
  • Page 40 IDT Software For EB-LOGAN-23 Notes 89EB-LOGAN-23 Evaluation Board 3 - 2 February 16, 2011...

  • Page 41: Schematics

    Chapter 4 Schematics ® Schematics Notes EB-LOGAN-23 Evaluation Board 4 - 1 February 16, 2011...
  • Page 42 CLOCK SELECTOR - SLOTS 0-20 POWER CONNECTORS POWER REGULATOR - VDDIO POWER REGULATOR - VDDCORE POWER REGULATOR - VDDPEA POWER REGULATOR - VDDPEHA POWER REGULATOR - VDDPETA TITLE EB-LOGAN-23 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 43: Mezzanine Connector Ports 0/2

    PE01TP1 S0_CLKP MEZZ_SMBCLK1 PE01RN1 SLOT_HDR_RSTN0 MEZZ_SMBDAT1 42 41 37 PE01RP1 SLOT_WAKEN0 MEZZ_SMBCLK1 MEZZ_SMBDAT1 STK0CFG0 EB-LOGAN-23 TITLE MEZZANINE CONNECTOR PORTS 0/2 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 44: Mezzanine Connector Ports 4/6

    PE05TP1 S4_CLKP MEZZ_SMBCLK2 PE05RN1 SLOT_HDR_RSTN4 MEZZ_SMBDAT2 42 41 37 PE05RP1 SLOT_WAKEN4 MEZZ_SMBCLK2 MEZZ_SMBDAT2 STK1CFG0 EB-LOGAN-23 TITLE MEZZANINE CONNECTOR PORTS 4/6 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 45: Mezzanine Connector Ports 8/12

    PE11TP0 S8_CLKP MEZZ_SMBCLK3 PE11RN0 SLOT_HDR_RSTN8 MEZZ_SMBDAT3 42 41 37 PE11RP0 SLOT_WAKEN8 MEZZ_SMBCLK3 MEZZ_SMBDAT3 STK2CFG0 EB-LOGAN-23 TITLE MEZZANINE CONNECTOR PORTS 8/12 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 46: Mezzanine Connector Ports 16/20

    PE19RN0 SLOT_HDR_RSTN16 MEZZ_SMBDAT4 42 41 37 7 PE19RP0 SLOT_WAKEN16 40 19 MEZZ_SMBCLK4 MEZZ_SMBDAT4 STK3CFG0 31 7 EB-LOGAN-23 TITLE MEZZANINE CONNECTOR PORTS 16/20 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 47: Nt24Ag2 - Serdes

    PE07RP1 PE07TP1 PE07RP1 PE07TP1 PE07RN1 PE07TN1 PE07RN1 PE07TN1 PE07RP0 PE07TP0 PE07RP0 PE07TP0 PE07RN0 PE07TN0 EB-LOGAN-23 PE07RN0 PE07TN0 TITLE 32NT24AG2 - SERDES SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 48: Nt24Ag2 - Clk, Config, Gpio

    GPIO5 GPIO05 AA21 GPIO6 GPIO06 AA22 GPIO7 GPIO07 GPIO8_IOEXPINTN GPIO08 9 10 11 12 13 14 32 EB-LOGAN-23 TITLE 32NT24AG2 CLK, CONFIG, GPIO SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 49: 32Nt24Ag2 - Power, Gnd

    VDDPEA VDDCORE VDDPEHA VDDPEA VDDCORE VDDPEHA VDDPEA VDDCORE AB13 VDDPEHA VDDPEA VDDCORE AB19 VDDPEHA VDDCORE VDDPEA AB10 EB-LOGAN-23 VDDPEHA VDDPEA VDDCORE TITLE AB16 VDDPEHA VDDPEA VDDCORE 32NT24AG2 - POWER SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 50: Ioexpander

    R1613 GPIO8_IOEXPINTN R1615 GPIO8_IOEXPINTN INT_N 7 9 10 11 12 13 INT_N IOEXPANDER 1 IOEXPANDER 3 ADDR: 0X26 ADDR: 0X22 EB-LOGAN-23 TITLE IOEXPANDER 0-3 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 51: Ioexpander

    R1617 GPIO8_IOEXPINTN R1619 GPIO8_IOEXPINTN INT_N 7 9 10 11 12 13 14 32 INT_N IOEXPANDER 5 IOEXPANDER 7 ADDR: 0X2A ADDR: 0X2E EB-LOGAN-23 TITLE IOEXPANDER 4-7 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 52: Ioexpander

    INT_N 7 9 10 11 12 13 14 32 INT_N 7 9 10 11 12 13 IOEXPANDER 9 IOEXPANDER 11 ADDR: 0X56 ADDR: 0X52 Logan Validation Board EB-LOGAN-23 TITLE IOEXPANDER 8-11 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 53: Ioexpander

    GPIO8_IOEXPINTN INT_N 7 9 10 11 12 13 14 32 INT_N 7 9 10 11 12 13 14 IOEXPANDER 13 IOEXPANDER 15 ADDR: 0X5E ADDR: 0X5A EB-LOGAN-23 TITLE IOEXPANDER 12-15 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 54: Ioexpander

    P13_LINKUPN P21_ACTIVEN P14_LINKUPN P22_ACTIVEN P15_LINKUPN P23_ACTIVEN INT_N INT_N IOEXPANDER 17 IOEXPANDER 19 ADDR: 0XA6 ADDR: 0XA2 EB-LOGAN-23 TITLE IOEXPANDER 16-19 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 55: Ioexpander

    P19_RSTN 11 19 35 P21_RSTN 11 19 35 P22_RSTN 10 19 35 P23_RSTN 11 19 35 INT_N IOEXPANDER 21 ADDR: 0XAA EB-LOGAN-23 TITLE IOEXPANDER 20-21 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 56: Hot Plug Control Ports

    12VGATE2 3VSENSE2 12VOUT2 3VIN2 S2_3V 0.008 R177 R185 R187 S2_12V R179 R183 0.013 EB-LOGAN-23 TITLE HOT PLUG CONTROL PORTS 0-2 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 57: Hot Plug Control Ports

    12VGATE2 3VSENSE2 12VOUT2 3VIN2 S6_3V 0.008 R212 R220 R222 S6_12V R214 R218 0.013 EB-LOGAN-23 TITLE HOT PLUG CONTROL PORTS 4-6 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 58: Hot Plug Control Ports

    12VGATE2 3VSENSE2 12VOUT2 3VIN2 S12_3V 0.008 R247 R255 R257 S12_12V R249 R253 0.013 EB-LOGAN-23 TITLE HOT PLUG CONTROL PORTS 8-12 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 59: Hot Plug Control Ports

    12VGATE2 3VSENSE2 12VOUT2 3VIN2 S20_3V 0.008 R282 R290 R292 S20_12V R284 R288 0.013 EB-LOGAN-23 TITLE HOT PLUG CONTROL PORTS 16-20 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.

  • Page 60: Slot Resets And Wake Pull-Ups

    OE_N OE_N OE_N R1284 SLOT_RSTN16 SLOT_RSTN8 SLOT_RSTN0 40 42 40 42 40 42 U107 U115 EB-LOGAN-23 TITLE SLOT RESETS AND WAKE PULL-UPS SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 61 221789-0 SATAIN_RSTN MTG1 MTG1 MTG2 MTG2 HDR_2x5 MAIN_CLKP MAIN_CLKN SMAIN_CLKP SMAIN_CLKN CGCLKP CGCLKN SATAIN_CLKP SATAIN_CLKN EB-LOGAN-23 TITLE VERT-SM 2.00MM NO-SHROUD CLOCK PLACE J6 CLOSE TO U51 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.

  • Page 62: Clock Buffer

    +3V3 R386 120OHM 0603 0805 400MA +3V3 IDT ICS9DB1200yGLF VDD6 BGCLK0P_R 33.2 R388 BGCLK0P VDD5 DIF_11_P BGCLK0N_R BGCLK0N 33.2 R389 VDD4 DIF_11_N VDD3 BGCLK1P_R 33.2 R390 BGCLK1P VDD2 DIF_10_P BGCLK1N_R BGCLK1N 33.2 R391 VDD1 DIF_10_N VDD0 BS00CLKP_R 33.2 R392 BS00CLKP...

  • Page 63: Clock Selector Dut Pclk 0-20, Gclk

    SH20_CLKN MTG1 P20_SATARSTN MTG1 TP132 P20_SATACLKP P20_SATACLKN MTG2 MTG2 VERT-SM 2.00MM NO-SHROUD EB-LOGAN-23 TITLE CLOCK SELECTOR DUT PCLK 0-20, GCLK 0-1 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 64 S20_SATACLKN MTG1 MTG1 MTG2 MTG2 MTG2 MTG2 VERT-SM 2.00MM VERT-SM 2.00MM NO-SHROUD NO-SHROUD EB-LOGAN-23 TITLE CLOCK SELECTOR SLOTS 0-20 SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 65 P12V12 GND3 P12V21 GND4 P12V22 RIGHT ANGLED GND TEST POINTS SCATTER AROUND BOARD TP16 TP17 TP18 TP19 EB-LOGAN-23 TITLE POWER CONNECTORS SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 66 GND34 GND20 GND35 GND21 GND36 GND22 GND37 GND23 GND38 GND24 GND39 GND25 GND40 EB-LOGAN-23 TITLE POWER REGULATOR - VDDIO SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 67 GND34 GND20 GND35 GND21 GND36 GND22 GND37 GND23 GND38 GND24 GND39 GND25 GND40 EB-LOGAN-23 TITLE POWER REGULATOR - VDDCORE SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 68 GND34 GND20 GND35 GND21 GND36 GND22 GND37 GND23 GND38 GND24 GND39 GND25 GND40 EB-LOGAN-23 TITLE POWER REGULATOR - VDDPEA SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 69 GND34 GND20 GND35 GND21 GND36 GND22 GND37 GND23 GND38 GND24 GND39 GND25 GND40 EB-LOGAN-23 TITLE POWER REGULATOR - VDDPEHA SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 70 GND34 GND20 GND35 GND21 GND36 GND22 GND37 GND23 GND38 GND24 GND39 GND25 GND40 EB-LOGAN-23 TITLE POWER REGULATOR - VDDPETA SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 71 DUT_JTAG_TRST_N DUT_JTAG_TDI DUT_JTAG_TDO 24LC512 DUT_JTAG_TMS MSMBCLK DUT_JTAG_TCK MSMBDAT VERT-TH 2.54MM SHROUD A0-2 INTERNALLY PULLED DOWN +3V3 EB-LOGAN-23 TITLE RESET, SMBUS, EEPROM, JTAG SSMBCLK SIZE DRAWING NO. FAB P/N REV. SSMBDAT SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 72 R826 DS132 MODE SM_SW4 SWMODE0 7 31 SWMODE1 7 31 SWMODE2 7 31 SWMODE3 7 31 EB-LOGAN-23 TITLE DIP SWITCHES SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 73 PORT 0 P4_APN R871 DS177 PORT 4 P3_APN R872 DS178 PORT 3 P2_APN R873 DS179 PORT 2 EB-LOGAN-23 TITLE P1_APN R874 DS180 PORT 1 LED - PORT STATUS (1 OF 7) P0_APN R875 DS181 PORT 0 SIZE DRAWING NO. FAB P/N REV.
  • Page 74 R709 DS51 PORT 1 P0_PFN P0_PWRGDN R686 DS28 PORT 0 R710 DS52 PORT 0 EB-LOGAN-23 TITLE LED - PORT STATUS (2 OF 7) SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 75 R946 DS252 PORT 1 P0_AIN P0_PIN R923 DS229 PORT 0 R947 DS253 PORT 0 EB-LOGAN-23 TITLE LED - PORT STATUS (3 OF 7) SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 76 19 14 10 P0_PEP P0_RSTN R734 DS76 PORT 0 R758 DS100 PORT 0 40 15 9 19 14 9 EB-LOGAN-23 TITLE LED - PORT STATUS (4 OF 7) SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 77 R994 DS300 PORT 1 P0_ILOCKST P0_MRLN R971 DS277 PORT 0 R995 DS301 PORT 0 EB-LOGAN-23 TITLE LED - PORT STATUS (5 OF 7) SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 78 R1017 DS323 PORT 2 P1_ILOCKP R1018 DS324 PORT 1 P0_ILOCKP R1019 DS325 PORT 0 EB-LOGAN-23 TITLE LED - PORT STATUS (6 OF 7) SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 79 BLUE P0_LINKUPN P0_ACTIVEN R1195 DS357 PORT 0 549R R1219 DS381 BLUE PORT 0 EB-LOGAN-23 TITLE LED - PORT STATUS (7 OF 7) SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 80 2.54MM NO-SHROUD +12V3_PS +12V3_PS +12V3_PS +12V3_PS +12V3_PS +12V3_PS +3V3_PS +3V3_PS +5V0_PS +5V0_PS +5V0_PS EB-LOGAN-23 TITLE MIN LOAD RESISTORS SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 81 SHROUD SHROUD SHROUD PORTS 23,22,21,20 PORTS 19,18,17,16 PORTS 3,2,1,0 SM_SW8 SM_SW8 SM_SW8 P0_CLK_EN P8_CLK_EN P16_CLK_EN P1_CLK_EN P9_CLK_EN P17_CLK_EN P2_CLK_EN P10_CLK_EN P18_CLK_EN EB-LOGAN-23 TITLE P3_CLK_EN P11_CLK_EN P19_CLK_EN P4_CLK_EN P12_CLK_EN P20_CLK_EN SIDEBAND CONNECTORS P5_CLK_EN P13_CLK_EN P21_CLK_EN P6_CLK_EN P14_CLK_EN P22_CLK_EN P7_CLK_EN P15_CLK_EN P23_CLK_EN SIZE DRAWING NO.
  • Page 82 19 39 40 19 39 40 VERT_SM 2.0MM VERT_SM 2.0MM NO-SHROUD NO-SHROUD TP141 TP149 TP142 TP150 EB-LOGAN-23 TITLE PARTITION RESET SELECT HEADERS SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 83 5 7 37 41 42 5 7 37 41 42 S6_SATA_RSTN S20_SATA_RSTN J128 J132 VERT_SM 2.0MM VERT_SM 2.0MM NO-SHROUD NO-SHROUD EB-LOGAN-23 TITLE SLOT RESET SELECT HEADERS SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC.
  • Page 84 PCLK_SSM SM_SW8 221789-0 P0_ICS_SSM P2_ICS_SSM CONNSMA P4_ICS_SSM P6_ICS_SSM P8_ICS_SSM P12_ICS_SSM P16_ICS_SSM P20_ICS_SSM 221789-0 EB-LOGAN-23 TITLE PORT 0 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 85 MTG1 MTG1 MTG2 PGND MTG2 J106 U122 J107 CONNSMA 221789-0 J108 CONNSMA 221789-0 EB-LOGAN-23 TITLE PORT 2 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 86 MTG1 MTG1 MTG2 PGND MTG2 J109 U123 J110 CONNSMA 221789-0 J111 CONNSMA 221789-0 EB-LOGAN-23 TITLE PORT 4 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 87 33.2 LSMA6_CLKN BYPASS MTG1 MTG1 MTG2 PGND MTG2 U117 CONNSMA 221789-0 CONNSMA 221789-0 EB-LOGAN-23 TITLE PORT 6 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 88 33.2 LSMA8_CLKN BYPASS MTG1 MTG1 MTG2 PGND MTG2 U118 CONNSMA 221789-0 CONNSMA 221789-0 EB-LOGAN-23 TITLE PORT 8 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 89 33.2 LSMA12_CLKN BYPASS MTG1 MTG1 MTG2 PGND MTG2 U119 CONNSMA 221789-0 CONNSMA 221789-0 EB-LOGAN-23 TITLE PORT 12 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 90 MTG1 MTG1 MTG2 PGND MTG2 J100 U120 J101 CONNSMA 221789-0 J102 CONNSMA 221789-0 EB-LOGAN-23 TITLE PORT 16 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 91 MTG1 MTG1 MTG2 PGND MTG2 J103 U121 J104 CONNSMA 221789-0 J105 CONNSMA 221789-0 EB-LOGAN-23 TITLE PORT 20 CLOCK GENERATOR SIZE DRAWING NO. FAB P/N REV. SCH-PESEB-001 18-691-000 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. Tony Tran Derek Huang 6024 SILVER CREEK VALLEY ROAD.
  • Page 92 IMPORTANT NOTICE AND DISCLAIMER RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.

Table of Contents