IDT EB4T4 Eval Board Manual

Idt 89ebpes4t4 evaluation board

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IDT
89EBPES4T4
Evaluation Board Manual
(Eval Board: 18-637-001)
August 2007
6024 Silver Creek Valley Road, San Jose, California 95138
Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775
Printed in U.S.A.
©2007 Integrated Device Technology, Inc.

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Summary of Contents for IDT EB4T4 Eval Board

  • Page 1 ® 89EBPES4T4 ™ Evaluation Board Manual (Eval Board: 18-637-001) August 2007 6024 Silver Creek Valley Road, San Jose, California 95138 Telephone: (800) 345-7015 • (408) 284-8200 • FAX: (408) 284-2775 Printed in U.S.A. ©2007 Integrated Device Technology, Inc.
  • Page 2 Integrated Device Technology, Inc. reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. IDT does not assume any responsibility for use of any circuitry described other than the circuitry embodied in an IDT product. The Company makes no representations that circuitry described herein is free from patent infringement or other rights of third parties which may result from its use.
  • Page 3: Table Of Contents

    Table of Contents ® Description of the EB4T4 Eval Board Notes Introduction .............................1-1 Board Features ..........................1-2 Hardware ..........................1-2 Software..........................1-2 Other............................1-2 Revision History ..........................1-2 Installation of the EB4T4 Eval Board EB4T4 Installation........................... 2-1 Hardware Description ........................2-1 Host System ...........................
  • Page 4 IDT Table of Contents Notes EB4T4 Eval Board Manual August 20, 2007...
  • Page 5 Attention Buttons ........................ 2-8 Table 2.9 Miscellaneous Jumpers, Headers ..................2-8 Table 2.10 LED Indicators ........................2-9 Table 2.11 PCI Express x4 Connector Pinout ..................2-10 Table 2.12 PCI Express x1 Connector Pinout ..................2-11 EB4T4 Eval Board Manual August 20, 2007...
  • Page 6 IDT List of Tables Notes EB4T4 Eval Board Manual August 20, 2007...
  • Page 7 List of Figures ® Figure 1.1 Function Block Diagram of the EB4T4 Eval Board ............1-1 Notes Figure 2.1 Clock Distribution Block Diagram ..................2-2 Figure 2.2 Power Distribution Block Diagram ..................2-3 Figure 2.3 APWRDIS# Timing ......................2-4 Figure 2.4 APWRDIS# Timing Circuit ....................2-4...
  • Page 8 IDT List of Figures Notes EB4T4 Eval Board Manual August 20, 2007...
  • Page 9: Description Of The Eb4T4 Eval Board

    Introduction Notes The 89HPES4T4 switch (also referred to as PES4T4 in this manual) is a member of IDT’s PCI Express® standard (PCIe®) based line of products. It is an 4-lane, 4-port switch. One upstream port is provided for connecting to the root complex (RC), and up to three downstream ports are available for connecting to PCIe endpoints or to another switch.
  • Page 10: Board Features

    IDT Description of the EB4T4 Eval Board Board Features Notes Hardware PES4T4 PCIe 4 port switch – Four ports (x1), 4 PCIe lanes – PCIe Base Specification Revision 1.1 compliant – Integrates four 2.5 Gbps embedded SerDes – Up to 256 byte maximum Payload Size –...
  • Page 11: Installation Of The Eb4T4 Eval Board

    Clock Configuration R32, R53, R51, R62 Installed Clock Source R32, R53 Onboard Reference Clock – Use onboard clock generator R51, R62 Upstream Reference Clock – Host system provides clock (Default) Table 2.1 Clock Source Selection EB4T4 Eval Board Manual 2 - 1 August 20, 2007...
  • Page 12: Table 2.3 Sma Connectors - Onboard Reference Clock

    IDT Installation of the EB4T4 Eval Board Notes The source for the onboard clock is the ICS9FG104 clock generator device (U8) connected to a 25MHz oscillator (Y1). When using the onboard clock generator, the EB4T4 allows the selection of spread spec- trum settings via DIP switches as described in Table 2.2 .
  • Page 13: Power Sources

    IDT Installation of the EB4T4 Eval Board Power Sources Notes Power for the EB4T4 is generated from the 12.0V PCI Express upstream slot power or optionally from 3.3Vaux. A 12.0V to 3.3V DC-DC converter will be used to provide power to four DC-DC converters to generate VDDcore, VDDpe, VDDpea, and VTT voltages.
  • Page 14 IDT Installation of the EB4T4 Eval Board Notes Figure 2.3 APWRDIS# Timing On initial power up APWRDIS# must be held low initially for 8 clocks after PERST# is removed. Then it must be sampled high 256 clocks after PERSTN# is removed to enable L2 mode. Subsequent PERST# will not affect the APWRDIS# state.
  • Page 15: Pci Express Serial Data Transmit Termination Voltage Converter

    IDT Installation of the EB4T4 Eval Board PCI Express Serial Data Transmit Termination Voltage Converter Notes A DC-DC converter (U6) provides a 1.5V PCI Express serial data transmit termination voltage (shown as VTTPE or VPETVTT) to the PES4T4. PCI Express Digital Power Voltage Converter A separate DC-DC converter (U16) provides a 1.0V PCI Express digital power voltage (VDDPE) to the...
  • Page 16: Downstream Reset

    IDT Installation of the EB4T4 Eval Board Notes • The host system board IO Controller Hub asserting PERST# signal, which propagates through the PCIe upstream edge connector of the EB4T4. Note that one can bypass the onboard voltage monitor (TLC7733D) by moving the shunt from pin 1-2 to pin 2-3 (default) on W2.
  • Page 17: Smbus Interfaces

    IDT Installation of the EB4T4 Eval Board Notes Signal Description Default S3[4] CCLKDS S3[5] CCLKUS S5[6] RSTHALT S5[1] SWMODE[0] S5[2] SWMODE[1] S5[3] SWMODE[2] S5[5] APWRDIS# Table 2.6 Boot Configuration Vector Switches S3 and S5 (ON=0, OFF=1) SMBus Interfaces The System Management Bus (SMBus) is a two-wire interface through which various system compo- nent chips can communicate.
  • Page 18: Miscellaneous Jumpers, Headers

    IDT Installation of the EB4T4 Eval Board Notes Button Description Port 4 Attention Button Port 3 Attention Button Port 2 Attention Button Table 2.8 Attention Buttons Miscellaneous Jumpers, Headers Miscellaneous Jumpers, Headers Ref. Type Default Description Designator S2[1] Switch Port2: Manually-operated Retention Latch...
  • Page 19: Leds

    IDT Installation of the EB4T4 Eval Board Notes Miscellaneous Jumpers, Headers Ref. Type Default Description Designator Header Shunted Power Good Enable Force On jumper for ICS90DB803 clock output enable (OE4#) Header Shunted Power Good Enable Force On jumper for ICS90DB803 clock...
  • Page 20: Pci Express Connectors

    IDT Installation of the EB4T4 Eval Board Notes Location Color Definition DS99 Green Port 2: Link Up indicator DS98 Green Port 3: Link Up indicator DS97 Green Port 4: Link Up indicator DS100 Green Port 0: Link Up indicator DS105...
  • Page 21: Table 2.12 Pci Express X1 Connector Pinout

    IDT Installation of the EB4T4 Eval Board Notes Side A Side B Ground PERn1 pair, Lane 1 PETp2 Transmitter differential Ground PETn2 pair, Lane 2 Ground Ground PERp2 Receiver differential Ground PERn2 pair, Lane 2 PETp3 Transmitter differential Ground PETn3...
  • Page 22: Eb4T4 Board Figure

    IDT Installation of the EB4T4 Eval Board Note: These x4 and x1 PCI Express connectors comply with the PCIe specification. The EB4T4 uses x1 connector on all downstream ports. According to the PCI Express specification, the PRSNT1# pin should be wired to the farthest available PRSNT2# pin on the connector.
  • Page 23: Software For The Eb4T4 Eval Board

    PCIe parts from IDT. Once users are familiar with the GUI, they will be able to use the same GUI on all PCIe parts from IDT. This software is customized for each device through an XML device description file which includes information on the number of ports, registers, types of registers, information on bit-fields within each register, etc.
  • Page 24 IDT Software for the EB4T4 Eval Board Notes EB4T4 Eval Board Manual 3 - 2 August 20, 2007...
  • Page 25: Schematics

    Chapter 4 Schematics ® Schematics Notes EB4T4 Eval Board Manual 4 - 1 August 20, 2007...
  • Page 26 DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Mon Jun 18 16:31:49 2007 SHEET 1 OF 17...
  • Page 27 DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:17 2007 SHEET 2 OF 17...
  • Page 28: Power Mosfets For 3.3Vaux

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:19 2007 SHEET 3 OF 17...
  • Page 29: Clocks

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:20 2007 SHEET 4 OF 17...
  • Page 30: Reset,Smbus,Jtag,Dipsw

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:21 2007 SHEET 5 OF 17...
  • Page 31 DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:22 2007 SHEET 6 OF 17...
  • Page 32 DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:22 2007 SHEET 7 OF 17...
  • Page 33: Io Expanders

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:23 2007 SHEET 8 OF 17...
  • Page 34: Io Expander Leds

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:24 2007 SHEET 9 OF 17...
  • Page 35: Hot Swap Control Port 2/3

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:13 2007 SHEET 10 OF 17...
  • Page 36: Hot Swap Control Port 3

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:13 2007 SHEET 11 OF 17...
  • Page 37: Pes4T4 Clock, Smbus Gpio

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:25 2007 SHEET 12 OF 17...
  • Page 38: Pes4T4 - Port

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:14 2007 SHEET 13 OF 17...
  • Page 39: Pes4T4 Downstream Ports

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:25 2007 SHEET 14 OF 17...
  • Page 40 DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:15 2007 SHEET 15 OF 17...
  • Page 41 DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:15 2007 SHEET 16 OF 17...
  • Page 42: Pes4T4 Power

    DRAWING NO. FAB P/N REV. STGSCH-00117 18-637-001 AUTHOR CHECKED BY CONFIDENTIAL PROPERTY OF INTEGRATED DEVICE TECHNOLOGY, INC. J.Carrillo D.Huang 6024 SILVER CREEK VALLEY RD. SAN JOSE, CA 95138 COPYRIGHT (C) IDT 2007 Thu Jul 26 15:56:16 2007 SHEET 17 OF 17...

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