Sx Flexible Jtag Mode - Actel Silicon Explorer II Quick Start Manual

SX Flexible
JTAG Mode
(Figure 10). In addition, by checking the "Reserve JTAG Pin" box, TDI,
TCK and TDO are not available for pin assignment in the Pin Editor.
Figure 10. Dedicated JTAG Mode
You do not need to specify an internal pull-up resistor; SE II automatically
configures TMS and TDI with internal pull-up resistors.
When you do not select the "Reserve JTAG Pin" box, you place the
FPGA in Flexible JTAG mode, where TDI, TCK and TDO pins may
function as user I/Os or JTAG pins. When in you select Flexible JTAG
mode, you disable the internal pull-up resistors on the TMS and TDI pins.
Note that you require an external 10K Ohm pull-up resistor on the TMS
pin (Figure 11).
Silicon Explorer II transforms TDI, TCK and TDO pins from user I/Os
into JTAG diagnostic pins when a rising edge at TCK is detected while
TMS is at logical low. The JTAG pins revert to user I/Os when the JTAG
state machine is in the Test-Logic reset state.
Figure 11. Flexible JTAG Mode. Note 10K Ohm Pull-up Resistor
SX Diagnostic Pin Consideration
SX FPGA
TMS
TDI
TDO
TCK
SX FPGA
VCCR
10K
TMS
TDI
TDO
TCK
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