IO
Considerations
During ISP
information. Click the program button to program the device
(Figure 7).
Figure 7. Command Module for Programming ProASIC Device
8. Verify the device. Verify the FPGA after programming. Click the
Verify button to verify the programmed device.
9. Place the plug-in connector in the programming header on
the board.
10. Power up the board for normal operation.
All I/O pins except for IEEE 1149.1 interface pins (TMS, TCK, TDI and
TDO) are tristated and the pull-up in the I/O enabled during
programming. This isolates the part and prevents the signals from
floating.
Programming ProASIC Devices
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