Debugging Sx Devices Using Silicon Explorer; Sx Probe Circuit Control Pins - Actel Silicon Explorer II Quick Start Manual

Debugging SX Devices Using
Silicon Explorer II

SX Probe Circuit Control Pins

Serial Connection
SX and SX-A Devices may require additional consideration when
debugging. You must SX and SX-A devices through the IEEE 1149.1 pins.
The user may configure the IEEE 1149.1 pins as dedicated (JTAG only) or
flexible (JTAG or I/O). This section assists the user with these and other
considerations when debugging SX or SX-A devices.
The Silicon Explorer II tool uses the IEEE 1149.1 ports (TDI, TCK, TMS
and TDO) to select the desired nets for debugging. The user assigns the
selected internal nets to the PRA/PRB pins for observation. Figure 8
illustrates the connection between Silicon Explorer II and the SX FPGA
required to perform in-circuit debugging.
Silicon Explorer II
TDI
TCK
TMS
TDO
PRA
PRB
Figure 8. Probe Setup
SX FPGA
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