Figure 3-5. Pia Cra Bit Assignments; Figure 3-6. Pia Ddrb Bit Assignments; Figure 3-7. Pia Prb Bit Assignments; Figure 3-8. Pia Crb Bit Assignments - Brainboxes IE-340 User Manual

Technical Details.

Figure 3-5. Pia CRA Bit Assignments.

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CRA BIT 7
0301 ATN
Hex FLAG

Figure 3-6. Pia DDRB Bit Assignments.

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DATA DIRECTION REGISTER B WHEN CRB BIT2 = 0
WHEN BIT=1 PORT LINE = OUTPUT, WHEN BIT=0 PORT LINE = INPUT
DDRB BIT 7
0302 SRQ
Hex DIR

Figure 3-7. Pia PRB Bit Assignments.

________________________________
PORT INPUT/OUTPUT REGISTER B WHEN CRB BIT2 = 1
IF BIT = 1 PORT LINE = IS HIGH, IF BIT = 0 PORT LINE = IS LOW
PRB BIT 7
0302 SRQ
________________________________ _

Figure 3-8. Pia CRB Bit Assignments.

CRB BIT 7
0303 SRQ IN DC IN
Hex FLAG
Note 1: ______ The IEEE input-output must be done at the i/o
address set by the DIP switches on the PC IEEE
board. The above i/o map is relative to the base
address set by these switches. I.E. If you are using
Chapter 3
BIT 6 BIT 5
IFC IFC CONTROL O/P OR I/P DDRA
FLAG 1
BIT 6 BIT 5
ATN EOI
DIR DIR
BIT 6 BIT 5
ATN EOI
BIT 6 BIT 5
DC CONTROL O/P ONLY
FLAG 1
BIT 4 BIT 3
1 IFC
BIT 4 BIT 3
DAV NRFD
DIR DIR
BIT 4 BIT 3
DAV NRFD
BIT 4 BIT 3
1 DC
PC IEEE Reference
BIT 2 BIT 1
ATN IRQ/FLAG
ACCESS CONTROL
BIT 2 BIT 1
NDAC REN
DIR DIR
BIT 2 BIT 1
NDAC REN
BIT 2 BIT 1
DDRB SRQ IRQ/FLAG
ACCESS CONTROL
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BIT 0
BIT 0
TE
DIR
BIT 0
TE
BIT 0