Ifc Interface Clear - Brainboxes IE-340 User Manual

Pc ieee 488 interface
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PC IEEE Reference
the factory set address 0300H then DDRA is at
0300H and CRB is at 0303H.
______
Note 2:
ATN has two lines into the computer, the CA7 line
is an input only line and is used in conjunction with
the IRQ jumper block to enable the computer to
handshake data from an external controller i.e.
computer can be programmed to act as peripheral.
Note 3:
______
For additional information on use of the MC68B21
see "8-Bit Microprocessors Data Manual" from
Motorola Semiconductors.
It is recommended that you do NOT attempt to handshake data
into and out from the IEEE bus using your own software
routines as the IEEE bus structure is complicated. Instead use
the high level function in the Pro-488 DOS Driver or, for greater
speed, access the jump table provided at a fixed offset from the
start of the resident Pro-488 driver. However, some users may
wish to to control non standard IEEE 488 instrumentation and
therefore require access to some of the IEEE lines directly.

IFC InterFace Clear.

__________________ _
The IFC control line is connected to CA2 of the PIA.
When the computer is acting as the system controller, ie ALL
THE TIME in normal use, the IFC line can be asserted by
pulling CA2 low. In practice, this line should only be toggled
low for short time and then returned high. The standard pulse
time is a minimum of 100 micro second.
In normal use IFC is permanently held HIGH. This is the
most sensible approach and will be found to be satisfactory to
all.
If you are using software that configures the PC IEEE as
an IEEE device then IFC can be used to produce an interrupt.
An IRQ to interrupt the processor can be generated by IFC
transitions when ALL the following conditions are met.
i.)
PC IEEE board configured as an IEEE device, use
the SLAVE command for this.
Page 30
Technical Details.
Chapter 3

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