Pin Descriptions - Teac PL-D200V Service Manual

ES6028FW (MPEG CHIP : IC61)

PIN DESCRIPTIONS

Name Number
VEE 1,18, 27, 59, 68,
75, 92, 99, 104,
130, 148, 157,
159, 164, 183,
193, 201
VSS 8, 17, 26, 34, 43,
52, 60, 67, 76,
84, 91, 98, 103,
112, 120, 129,
138, 147, 156,
163, 171, 177,
184, 192, 200,
208
LA[21:0] 23:19, 16:10,
7:2, 207:204
VCC 9, 35, 44, 83,
121, 139, 172
RESET# 24
TDMDX
RSEL 25
TDMDR 28
TDMCLK 29
TDMFS 30
TDMTSC# 31
TWS
SEL_PLL2 I
32
TSD0
33
SEL_PLL0
TSD1
36
SEL_PLL1
TSD[2] 37
TSD[3] 38
98
I/O
I I/O power supply.
I GROUND.
O Device address output.
I power supply.
I Core power supply.
O TDM transmit data.
I ROM Select.
I TDM receive data.
I TDM clock input.
I TDM frame sync.
O TDM output enable.
O Audio transmit frame sync.
System and DSCK output clock frequency selection is made at the rising edge of
RESET#. The matrix below lists the available clock frequencies and their respective
PLL bit settings.
SEL_PLL2
0
0
0
0
1
1
1
1
O Audio transmit serial data port 0.
I Refer to the description and matrix for SEL_PLL2 pin 32.
O Audio transmit serial data port 1.
I Refer to the description and matrix for SEL_PLL2 pin 32.
O Audio transmit serial data output 2.
O Audio transmit serial data output 3.
Definition
SEL_PLL1 SEL_PLL0 Clock Type
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
VCO off.
DCLK
Bypass mode
DCLK x 2
DCLK x 4.5
DCLK x 3
DCLK x 3.5z
DCLK x 4