Teac PL-D200V Service Manual page 81

PIN No. Pin Name
46 VDD2.5
47 OUT2B
48 OUT2A
49 OUT1B
50 OUT1A
51 EAPD
52 VDD3.3
53 GND
54 VDD2.5
55 BICKO
56 LRCKO
57 SDO12
58 SDOO34
59 VDD3.3
60 GND
61 VDD2.5
62 SDO56
63 SDO78
64 PWDN
BLOCK DIAGRAM
LRCKI
BICKI
SERIAL
SDI12
DATA
SDI34
SDI56
SDI78
CHANNEL
MAPPING
PLL
PLLB
XTI
96
I/O
2.5V Logic Supply
O PWM Channel 2 Output B
O PWM Channel 2 Output A
O PWM Channel 1 Output B
O PWM Channel 1 Output A
O External Amp Power Down
O 3.3V I/O Supply
Ground
2.5V Logic Supply
O I2S Serial Clock Output
O I2S Left/Right Clock Output
O I2S Data Channels 1&2 Output
O I2S Data Channels 3&4 Output
O 3.3V I/O Supply
Ground
2.5V Logic Supply
O I2S Data Channels 5&6 Output
O I2S Data Channels 7&8 Output
O Device PowerDown
SA SCL SDA
2
I
IN
SYSTEM
CONTROL
MIX
TREBLE,
BASS, EQ
SYSTEM TIMING
CKOUT
MVO
C
VOLUME
LIMITING
POWER-DOWN
PWDN EAPD
Function
DDX
SERIAL
DATA
OUT
OUT1A/B
OUT2A/B
OUT3A/B
OUT4A/B
OUT5A/B
OUT6A/B
OUT7A/B
OUT8A/B
LRCKO
BICKO
SDO12
SDO34
SDO56
SDO78