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Section 1
Service Overview
1-1. Circuit Description
The electrical circuit of the BVP-9500WS/9500WSP consists of the following blocks. This section
describes each block separately.
. CCD drive block
. Power supply block
. Video signal processing block
. System control block
(1) CCD drive block
PA-226/226A/226B boards
The PA boards are a flexible boards. There are three PA boards for R, G and B channels. A CCD and its
preamplifier are mounted on each board.
DR-377A board
CCD horizontal clock and reset gate drivers are mounted on the DR-377A board.
It supplies various pulses and voltages required for driving the CCD to the PA flexible boards.
TG-194 board
A CPU is mounted on the TG-194 board. The CPU performs data processing inside the CCD drive block
according to various commands. It performs RPN correction also.
TG-203A board
CCD vertical clock drivers are mounted on the TG-203A board.
This board generates various pulses such as a CCD drive pulse and a sample pulse. These pulses are
based on the clock PLL-locked by the VCO control voltage sent from the camera. The generated pulses
are sent to the DR-377A and PA-226 boards.
This board generates the Vsub voltage and the reset gate pulse (RG) bias. They are supplied to the CCDs
via the DR-377A board.
CN-2095 board
The CN-2095 board has a D-SUB 29-pin connector and performs interfacing with the camera.
RGB signals input from the VA-189 board are sent to the camera, while command data sent from the
camera are sent to the TG-194 board.
SH-69 board
The SH-69 board generates black shading correction signals. The correction signals generated here are
added to the main signal at the VA-189 board.
NR-65 board
The NR-65 board is a low pass filter for extracting the clock components of video signals sent from the
PA-226 board.
VA-189 board
The VA-189 board switches the gain of video signals sent from the NR-65 board. It also generates the test
signal.
1-1 (E)
BVP-9500WS/9500WSP MM
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