Table of Contents
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RAM1_BUS
002
C310
0.1uF
RAM1_AD
002
IC201
W9825G2DB-75-ER25
1
RAM1_DQ[26]
DQ26[A1]
2
RAM1_DQ[28]
DQ28[B1]
3
VSSQ1[C1]
4
C306
VSSQ2[D1]
0.1uF
5
VDDQ1[E1]
6
VSS1[F1]
RAM1_A[4]
7
A4[G1]
8
RAM1_A[7]
A7[H1]
9
RAM1_CLK
CLK[J1]
10
DQM1[K1]
11
VDDQ2[L1]
C307
12
0.1uF
VSSQ3[M1]
13
VSSQ4[N1]
14
RAM1_DQ[11]
SDRAM 1
DQ11[P1]
15
RAM1_DQ[13]
DQ13[R1]
16
RAM1_DQ[15]
DQ15[R2]
17
VSS2[R3]
C308
0.1uF
21
VDD1[R7]
22
RAM1_DQ[0]
DQ0[R8]
RAM1_DQ[2]
23
DQ2[R9]
24
RAM1_DQ[4]
DQ4[P9]
25
C309
VDDQ3[N9]
0.1uF
26
VDDQ4[M9]
27
VSSQ5[L9]
C311
C312
C313
C314
0.1uF
0.1uF
0.1uF
0.1uF
DTC114TE-TL
DTC114TE-TL
R151
R152
R153
Q22
R154
002
O_TALLY_U_L1
R155
Q23
002
O_TALLY_U_L2
Q24
002
O_TALLY_UD_C
Q25
002
O_TALLY_U_R1
002
O_TALLY_U_R2
DTC114TE-TL
GND
DTC114TE-TL
DTC114TE-TL
+3.1V-3
WB
002
RB802
47k
S2
2
1
WB_SUB_0
DTL
4
3
WB_SUB_1
CRISP
6
5
F_INV
INVS
8
7
TEST
LVL-CRISP
+3.1V-3
GND
002
S1
I_SW[0]
SW_0_1_TALY
I_SW[1]
SW_1_2_B_SC
I_SW[2]
SW_2_3_PEAK
I_SW[3]
SW_3_4_MAG
I_SW[4]
SW_4_5_N-PEAK
I_SW[5]
SW_5_6_WB1X
I_SW[6]
SW_6_7_WB2X
I_SW[7]
SW_7_8_S-LOG
HDVF-C30WR
I
J
RAM2_BUS
002
+1.8V
+3.1V
FB301
FB305
RAM2_AD
002
NM
C315
10uF
IC202
W9825G2DB-75-ER25
C316
10uF
1
RAM2_DQ[26]
81
DQ26[A1]
RAM1_DQ[25]
DQ25[C3]
2
+3.1V
RAM2_DQ[28]
80
DQ28[B1]
+1.8V
VSSQ10[B3]
3
FB306
VSSQ1[C1]
FB302
4
C319
VSSQ2[D1]
NM
0.1uF
5
VDDQ1[E1]
C317
6
10uF
76
VSS1[F1]
VDDQ10[B7]
7
RAM2_A[4]
75
A4[G1]
VSSQ9[B8]
8
RAM2_A[7]
74
A7[H1]
RAM1_DQ[20]
DQ20[C8]
RAM2_CLK
9
73
CLK[J1]
RAM1_DQ[18]
DQ18[D8]
10
72
RAM1_DQ[16]
DQM1[K1]
DQ16[E8]
11
71
VDDQ2[L1]
DQM2[F8]
C320
12
70
0.1uF
VSSQ3[M1]
RAM1_A[0]
A0[G8]
13
69
RAM1_BA[1]
VSSQ4[N1]
BA1[H8]
14
RAM2_DQ[11]
68
DQ11[P1]
RAM1_CS
CS[J8]
15
RAM2_DQ[13]
67
DQ13[R1]
RAM1_WE
WE[K8]
16
RAM2_DQ[15]
66
DQ15[R2]
RAM1_DQ[7]
DQ7[L8]
17
65
VSS2[R3]
RAM1_DQ[5]
DQ5[M8]
64
RAM1_DQ[3]
DQ3[N8]
63
VSSQ8[P8]
C321
62
0.1uF
VDDQ9[P7]
21
VDD1[R7]
C318
0.1uF
RAM2_DQ[0]
22
DQ0[R8]
23
RAM2_DQ[2]
DQ2[R9]
24
RAM2_DQ[4]
58
DQ4[P9]
VSSQ7[P3]
25
C322
57
VDDQ3[N9]
0.1uF
VDDQ8[P2]
26
56
VDDQ4[M9]
RAM1_DQ[12]
DQ12[N2]
27
55
VSSQ5[L9]
RAM1_DQ[10]
DQ10[M2]
GND
C324
0.1uF
Q27
+3.1V-3
CN5
DTC144EE-TL
GND
1
Q28
+3.1V
2
DTC144EE-TL
68
U/L1_TALLY
3
220
U/L2_TALLY
4
220
U/C_TALLY
5
68
U/R1_TALLY
6
220
002
O_TALLY_D_L1
U/R2_TALLY
7
8
9
002
O_TALLY_D_L2
GND
002
O_TALLY_D_R1
Q26
002
O_TALLY_D_R2
Q29
DTC144EE-TL
GND
DTC144EE-TL
002
PLL
DIP-SW
+3V
L4
IC18
2.2uH
TLC2933AIPWR
1
10
14
S1
R418
TP1
LVDD
VCOVDD
12
4.7M
VCOINH
1
2
VCOIN
TALY
13
6
PFDOUT
3
4
RBIAS
B/SC
PLL_REF
4
3
R187
5
6
VCOOUT
1k
FIN-A
PEAK
8
TEST
7
8
MAG
5 FIN-B
2
R190
R188
PLL_FB
SELECT
1M
9
10
PFDINH
100k
NPEAK
LGND
VCOGND
NM
11
12
WB1X
7
9
11
GND
C95
13
14
0.8
WB2X
0.022uF
CL204
15
16
GND
GND
GND
K
PR-312 (1/2)
PR-312 (1/2)
SUFFIX: -12
SUFFIX: -12
+1.8V
+3.1V
C323
0.1uF
FB303
FB307
NM
C328
10uF
C329
10uF
81
RAM2_DQ[25]
DQ25[C3]
+3.1V
80
+1.8V
VSSQ10[B3]
FB308
FB304
NM
C330
10uF
76
VDDQ10[B7]
75
VSSQ9[B8]
74
RAM2_DQ[20]
DQ20[C8]
73
RAM2_DQ[18]
DQ18[D8]
002
72
RAM2_DQ[16]
DQ16[E8]
71
DQM2[F8]
70
RAM2_A[0]
A0[G8]
69
RAM2_BA[1]
BA1[H8]
68
RAM2_CS
SDRAM 2
CS[J8]
67
RAM2_WE
WE[K8]
66
RAM2_DQ[7]
DQ7[L8]
65
RAM2_DQ[5]
DQ5[M8]
64
RAM2_DQ[3]
DQ3[N8]
63
VSSQ8[P8]
62
VDDQ9[P7]
C331
0.1uF
58
VSSQ7[P3]
57
VDDQ8[P2]
56
RAM2_DQ[12]
DQ12[N2]
55
RAM2_DQ[10]
DQ10[M2]
GND
C325
C326
C327
0.1uF
0.1uF
0.1uF
+3.1V-3
CN6
GND
1
+3.1V
2
R156
470
D/L1_TALLY
3
R157
470
D/L2_TALLY
4
330
R158
D/C_TALLY
5
470
R159
D/R1_TALLY
6
R160
470
D/R2_TALLY
7
PANEL No.
NC
8
9
10
S3
2
1
RB803
4
3
2
1
GND
1k
4
3
6
5
8
7
6
5
2
1
8
7
Q31
RB804
DTC144EE-TL
4
3
10
9
1k
6
5
12
11
8
7
14
13
16
15
Q30
GND
PLL/CLOCK
74M_2
002
IC19
IC15
TC7SZ04FU(TE85R)
TC7SZ04FU(TE85R)
L5
2.2uH
C135
X1
1000pF
74MHz
GND
1
5
NC
VCC
5
5
8
4
R223
R225
VT
OUT
R199
1k
1k
VCC
VCC
G1
G2
G3
G4
4.7k
2
3
6
7
74M
4
2
4
2
Y
A
Y
A
C102
1
1
R224
22uF
C103
R226
NC
NC
6.3V
47
0.1uF
68
GND
GND
3
3
C334
C335
C115
C96
C101
0.1uF
0.1uF
0.1uF
1uF
0.1uF
6.3V
CC-C
C114
22uF
6.3V
4-5
4-5
L
M
to VPR-103 (Pacific)
+3.1V
CN4
+3.1V
1
2
+3.1V
3
4
+3.1V
5
6
7
8
+3.1V
9
10
+3.1V
+3.1V
11
12
001
PWRGD
PWRGD
13
14
GND
15
16
GND
17
18
002
LCD2_CONT
GND
19
20
L2_RESET
L2_RESET
21
22
L2_SDI
L2_SDI
23
24
L2_SCL
L2_SCL
25
26
L2_CS
L2_CS
27
28
GND
29
30
002
O_CLK_SYS
CLK_SYS
31
32
CLOCK
33
34
CLK_DDR
GND
35
36
CL200 0.8
R401
0
PACIFIC_H_ACT
PACIFIC_H_ACT
37
38
NC
39
40
O_D_B[8]
D_B_10
41
42
O_D_B[7]
D_B_9
43
44
O_D_B[9]
D_B_11
45
46
O_D_B[3]
D_B_5
47
48
O_D_B[4]
D_B_6
49
50
O_D_B[2]
D_B_4
51
52
002
O_D_B
O_D_B[6]
D_B_8
53
54
O_D_B[5]
D_B_7
55
56
002
O_P_RST_PLL2_X
RST_PLL2_X
57
58
PLL CONTROL
59
60
002
O_P_RST_PLL1_X
RST_PLL1_X
GND
61
62
O_H_X
O_H_X
CL201 0.8
H
63
64
O_V_X
O_V_X
CL202 0.8
002
O_D_T
V
65
66
NC
67
68
GND
69
70
002
O_P_RST_X
RST_X
71
72
RESET
002
O_P_SRST_X
SRST_X
73
74
GND
75
76
CPU_CLK
CPU_CLK
77
78
O_CLK_IF
CLK_IF
79
80
CPU_DATA[9]
CPU_DATA_9
81
82
CPU_DATA[5]
CPU_DATA_5
83
84
CPU_DATA[14]
85
86
CPU_DATA_14
CPU_ADRS_13
CPU_DATA[12]
CPU_DATA_12
87
88
CPU_ADRS_14
CPU_DATA[6]
CPU_DATA_6
89
90
CPU_ADRS_11
CPU_DATA[10]
CPU_DATA_10
91
92
CPU_DATA[15]
CPU_DATA_15
93
94
CPU_ADRS_16
CPU_DATA[7]
CPU_DATA_7
95
96
CPU_ADRS_15
CPU_DATA[13]
CPU_DATA_13
97
98
CPU_DATA[2]
CPU_DATA_2
99
100
CPU_DATA[11]
CPU_DATA_11
101
102
CPU_DATA[0]
CPU_DATA_0
103
104
CPU_ADRS_17
CPU_DATA[1]
CPU_DATA_1
105
106
CPU_DATA[8]
CPU_DATA_8
107
108
CPU_DATA[4]
CPU_DATA_4
109
110
CPU_ADRS_12
CPU_DATA[3]
111
112
CPU_DATA_3
002
XRESET
XRESET
113
114
DDRIC_EN
115
116
CPU_ADRS_10
CPU_CS_X
CPU_CS_X
117
118
GND
119
120
CPU-IF
002
CONT
001
VR_AD
002
VR_CONT
VR_AD
002
+3V
C94
0.1uF
IC203
TC7W53FK(TE85R)
IC17
8
R178
AD7829BRUZ-REEL7
0
1
VCC
7
COMMON
CH0
6
CH1
d2
1
28
d3
5
H:CH1
DB2
DB3
A
L:CH0
2
2
d1
27
d4
DB1
DB4
INH
3
26
GND
VEE
R203
R204
d0
d5
R181
DB0
1k
DB5
1k
0
I_VR_RD
4
25
d6
4
3
ST
CONVST
DB6
C91
5
24
d7
22uF
CS
DB7
C90
6.3V
GND -6.8V
VR_EOC
6
23
0.1uF
I_VR_EOC
RD
AGND
7
22
+3.1V-3
DGND
VDD
GND
8
21
EOC
VREFIN/OUT
9
20
C89 0.1uF
dA2
A2
VMID
GND
10
19
dA1
A1
VIN1
dA0
11
18
A0
VIN2
12
17
VIN8
VIN3
13
16
VIN7
VIN4
C332
14
15
0.1uF
VIN6
VIN5
GND
Q17
R179
3.3k
2SC4177-T1L5
+2V
C136
1000pF
+3.1V-2
C92
R189
0.1uF
100
R175
C97
2.2k
4.7uF
6.3V
R180
R176
CC-C
9 -
100
330
GND
8
+
GND
10
IC22
(3/5)
R177
NJU7034V-TE2
10k
GND
N
O
1
+2.5V
PLUG
+2.5V
+1.8V
+2.5V
+1.8V
+1.8V
+1.8V
+1.8V
GND
GND
GND
OSD
002
GND
OSD_BLK
OSD_BLK
OSD_D[3]
OSD_D[3]
OSD_D[0]
OSD_D[0]
OSD_D[2]
OSD_D[2]
R406
0
OSD_D[1]
CONTRAST
OSD_CLK
OSD_CLK
CONT
001
GND
R416
0
TDI(D_G_2)
TDI
002
0
R417
TDO(D_G_3)
TDO
002
O_D_G[9]
D_G_11
O_D_G[8]
D_G_10
O_D_G[7]
D_G_9
O_D_G[6]
D_G_8
2
O_D_G[4]
D_G_6
O_D_G[2]
D_G_4
O_D_G
002
O_D_G[3]
D_G_5
O_D_G[5]
D_G_7
TMS(D_R_3)
0
R413
TMS
002
TCK(D_R_2)
R414
0
TCK
002
O_D_R[4]
D_R_6
O_D_R[3]
D_R_5
O_D_R[8]
D_R_10
O_D_R[6]
D_R_8
O_D_R[9]
D_R_11
O_D_R[5]
D_R_7
O_D_R[7]
D_R_9
O_D_R[2]
D_R_4
O_D_R
002
GND
R407
0
CPU_BE_L_X
CPU_BE_L_X
0
R408
NM
CPU_BE_U_X
CPU_BE_U_X
CPU_OE_X
CPU_OE_X
CPU_ADRS[7]
CPU_ADRS_7
CPU_ADRS[13]
CPU_ADRS[14]
CPU_ADRS[11]
CPU_ADRS[4]
CPU_ADRS_4
CPU_ADRS[16]
CPU_ADRS[15]
3
CPU_ADRS[3]
CPU_ADRS_3
CPU_ADRS[2]
CPU_ADRS_2
CPU_ADRS[8]
CPU_ADRS_8
+3.1V-3
CPU_ADRS[17]
CPU_ADRS[1]
CPU_ADRS_1
(2/2)
CPU_ADRS[5]
CPU_ADRS_5
CPU_ADRS[12]
TC7SH08FU(T5RSOYJF)
VCC
CPU_ADRS[6]
IC204
GND
CPU_ADRS_6
CPU_ADRS[9]
CPU_ADRS_9
CPU_ADRS[10]
CPU_RW
GND
CPU_RW
GND
GND
LP1
NM
GND
4
IC204
(1/2)
TC7SH08FU(T5RSOYJF)
2
4
1
H:SEL1(Control)
L:SEL2(PRESET)
for_VR-280
CN7
13
14
GND
R205 2.2k
PEAK
12
R206 2.2k
P-PEAK
11
R207 2.2k
BRIGT
10
R208 2.2k
P-BRIGT
9
R209 2.2k
CONT
8
5
R210 2.2k
P-CONT
7
R211 2.2k
SEL2
6
R212 2.2k
INV
5
+2V
4
TALLY_OUT
3
+3.1V-3
+3.1V-3
2
GND
1
R213
R214
47k
47k
GND
PR-312 (1/2)
BOARD NO. 1-879-250-12
P
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