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2.5 Debug Support
The DSP56F801EVM provides an on-board Parallel JTAG Host Target Interface and a
JTAG interface connector for external Target Interface support. Two interface connectors
are provided to support each of these debugging approaches. These two connectors are
designated the JTAG connector and the Host Parallel Interface Connector.
2.5.1 JTAG Connector
The JTAG connector on the DSP56F801EVM allows the connection of an external Host
Target Interface for downloading programs and working with the DSP56F801's registers.
This connector is used to communicate with an external Host Target Interface which
passes information and data back and forth with a host processor running a debugger
program.
Table 2-2
When this connector is used with an external Host Target Interface, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG5. Reference
Table 2-3
for this jumper's selection options.
Table 2-3. Parallel JTAG Interface Disable Jumper Selection
2-6
shows the pin-out for this connector.
Table 2-2. JTAG Connector Description
Pin #
Signal
1
TDI
3
TDO
5
TCK
7
NC
9
RESET
11
+3.3V
13
NC
JG5
No jumpers
On-board Parallel JTAG Interface Enabled
1–2
Disable on-board Parallel JTAG Interface
DSP56F801EVM Hardware User's Manual
J8
Pin #
Signal
2
GND
4
GND
6
GND
8
KEY
10
TMS
12
NC
14
TRST
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