American Megatrends StorTrends 1312 User Manual page 12

Intel® Pentium® III Processor
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The Pentium® III Processor is available at speeds ranging from 500 MHz to 1.0 GHz
(1000 MHz)
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Versions available with either a 133 MHz or a 100 MHz system bus that are
designed to support the Intel® 810E chipset on the StorTrends 1312
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Incorporate 256 KB Advanced Transfer Cache (on-die, full-speed level 2 (L2) cache
with Error Correcting Code (ECC)
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32 KB (16 KB/16 KB) non-blocking, level 1 (L1) cache
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P6 Dynamic Execution microarchitecture including multiple branch prediction, data
flow analysis and speculative execution
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Internet Streaming SIMD Extensions, consisting of 70 new instructions that enable
advanced imaging, 3D, streaming audio and video, speech recognition and an
enhanced Internet experience
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Intel® MMX™ media enhancement technology
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Dual Independent Bus (DIB) architecture increases bandwidth and performance over
single-bus processors
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Data integrity and reliability features such as Error Correction Code, Fault Analysis
and Recovery for both system and L2 cache buses
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Intel® processor serial number, designed to improve asset management, platform
identification and information management capabilities
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Versions based upon Intel®'s 0.18 micron manufacturing process for increased
processor core frequencies and reduced power consumption
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Fully compatible with existing Intel® Architecture-based software
P6 Dynamic Execution Microarchitecture
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Multiple branch prediction: predicts program execution through multiple branches,
accelerating the flow of work to the processor
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Dataflow analysis: Creates an optimized, reordered schedule of instructions by
analyzing data dependencies between instructions
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Speculative execution: carries out instruction execution speculatively and based upon
this optimized schedule, ensures that the processor's superscalar execution units
remain busy, boosting overall performance
Dual Independent Bus (DIB)
The Pentium® III processor supports the high-performance Dual Independent Bus (DIB)
architecture. The DIB architecture places the level 2 cache on a dedicated, high-speed
cache bus allowing for the system bus to be freed up from cache traffic. This provides
significantly higher overall system bandwidth and allows for a dramatic improvement in
system performance and scalability.
Non-Blocking Level 1 Cache
The Pentium® III processor includes two separate 16 KB level 1 (L1) caches, one for
instruction and one for data. The L1 cache provides fast access to the recently used data,
increasing the overall performance of the system.
6 AMI StorTrends 1312 User's Guide
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