Olympus OEP-3 Service Manual page 124

4-1-8. Masking Block
The masking block corrects the difference between the ideal reproduction color and the three primary
colors (Y, M, and C) of printed materials using a two-ROM data conversion system of main masking
ROM and sub-masking ROM.
The MAIN, SUB1, and SUB2 signals output from a color adjustment circuit (on the print side) is input to
the main and sub-masking ROMs together with print color information (COLOR0 and COLOR1 signals).
The data that was masking-corrected using a two-ROM conversion table is latched by IC905 and IC909
and output to the PRT-13 board as eight-bit print data.
Bus switcher
The bus switcher is a circuit (CXD8868Q IC703) that switches an image bus. This circuit has three 24-bit
ports (IOA, IOB, and IOC). As described below, it controls a bus by DIR0 and DIR1 pins.
DIR0 DIR1 Direction of bus
IOA → IOC
1 1
IOB → IOC
1 0
IOC → IOA
1 X
The bus switcher also has a function that sets an output bus to "ALL LOW" by setting the FIX pin to
"High". This function assigns the background color when the effective screen is reduced as shown below
using FIX, DIR0, and DIR1 pins.
4-1-9. A/D and D/A Conversion Blocks
The A/D conversion block consists of three A/D converters (CXD1176Q IC350 to IC352). The analog
RGB signal input from an analog signal processing block is clamped using a clamp pulse (nCLAMP
signal) and adjusted in gain using a CLP_REF signal that is input to the VREF pin of an A/D converter.
In the D/A conversion block, an eight-bit digital RGB signal is converted into an analog video signal
using an encoder (BH7243KV IC407) incorporating a three-channel D/A converter.
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OEP-3 V1 (UC)