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2.7.1 JTAG Connector
The JTAG connector on the DSP56F807EVM allows the connection of an external Host
Target Interface for downloading programs and working with the DSP56F807's registers.
This connector is used to communicate with an external Host Target Interface which
passes information and data back and forth with a host processor running a debugger
program.
Table 2-3
When this connector is used with an external Host Target Interface, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG4. Reference
Table 2-4
for this jumper's selection options.
Table 2-4. Parallel JTAG Interface Disable Jumper Selection
shows the pin-out for this connector.
Table 2-3. JTAG Connector Description
Pin #
Signal
1
TDI
3
TDO
5
TCK
7
NC
9
RESET
11
+3.3V
13
NC
JG4
No jumpers
On-board Parallel JTAG Interface Enabled
1–2
Disable on-board Parallel JTAG Interface
Technical Summary
J3
Pin #
Signal
2
GND
4
GND
6
GND
8
KEY
10
TMS
12
NC
14
TRST
Comment
Debug Support
2-9
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