Schematic Diagram - Main Section (6/9) - Sony HCD-SX7 Service Manual

2020/02/27 22:53:44 (GMT+09:00)
HCD-SX7/SX7B

5-10. SCHEMATIC DIAGRAM - MAIN Section (6/9) -

1 2 3
MAIN BOARD (6/9)
A
>112S
A5V
I2S_LRCK_TD
MAIN
BOARD I2S_BCK_TD
(3/9)
I2S_DIN_TD
(Page 43)
R721 R719
10k 100k
B
R722 R720
10k 100k
IC704
C
WAVE SHAPER
IC704
TC7WH04FK
D
>105S
GND
MTK-BCK
MAIN
MTK-LRCK
BOARD
(1/9)
E
MTK-DATAO
(Page 41)
SEL1OUT_BCLK
>133S
SEL1OUT_LRCLK
MAIN
SEL1OUT_SDA
BOARD
DIR_ERRF
(8/9)
F (Page 48)
DIR_NPCMF
G
H
R756
100
R762
0
I
HCD-SX7/SX7B
• See page 56 for Waveforms. • See page 56 for IC Block Diagrams.
4 5 6
R711
10k
IC702
WAVE SHAPER
IC702
TC7WH04FK
R709 R705
100k 47
R707
47
IC703
SAMPLE RATE CONVERTER
IC703
SRC4182
28 1
MODE2 LGRP
27 2
3.2
MODE1 RCKI
26 3
MODE0 NC
3.2 25 4 0
BCKO SDIN
0.1 24 5 0
LRCKO BCKI
0 23 6 0
SDOUT LRCKI
3.2 22 7 3.2
VDD VIO
21 8
DGND_21 DGND_8
20 9
TDMI BYPAS
JC701 0 19 10
OFMT0 IFMT0
JC702 0
18 11
OFMT1 IFMT1
R757 R704
JC703 0
17 12
100 100
OWL0 IFMT2
16 13 0
OWL1 RST
JC704 3.2 15 14 3.2
R760 R758
0 RDY MUTE
0 0
R755
100
7 8 9
(SX7B)
R701 47
R702 47
R703 47
(SX7)
C712 C706
0.1 0.1 C715
0.1
C714
1000p
100V
C713
R723
0.068
100
0 1
LPF
2
PGND
R706
3
47
MCKIN
1.6 4
BCKIN
1.6 5
LRCKIN
1.6 6
DATAIN
7
MPIN1
1.6 8
MPIN2
1.6 9
MPIN3
1.8 10
MPIN4
11
MPIN5
6 5 12
MPIN6
13
MCKOUT
1.6 14
BCKOUT
1.6 15
LRCKOUT
1.6 16
DATAOUT
R713
0
R753
R726
100
100
R724 100
R725 100
C709
0.1
JC706 0
R764
0
JC707 0
C701
0.1
JC708 0
R708
0
46 46
10 11 12
R751
100k
C717 R752
0.1 100k
48 2.3
VREF
47
AGND
46 4.9
AVDD
45 2.4
ADINL
44 2.4
ADINR
43
DGND_43
42 3.2
IC705
DVDD_42
41
CL710
DSTATE
DIGITAL AUDIO INTERFACE RECEIVER 40 3.2
INTB
IC705
39 0
LC89075WA-H
SO
38 0
SI
37 3.3
SCK
36 3.3
CSB
35 3.3
XMODE
34 3.2
DVDD_34
33
DGND_33
C718
12p
R739
X701
1M
24.576MHz
R740
C721
7 1k
15p
C716 C723 C722
0.1 0.1 0.1
Note: When the IC705 is replaced, refer to "CHECKING OF NET-
WORK CONNECTION" on page 5.
13 14
>134S
GND
C730
A5V
0.1
MAIN
BOARD
AGND
(9/9)
(Page 49)
C724 C725
10 220
16V 6.3V
C719 C720
0.1 0.1
>115S
AGND
SPDIFOUT
MAIN
LINEIN_L
BOARD
(3/9)
LINEIN_R
(Page 43)
DIR_INTB
SPI_DIR_MDI
SPI_DIR_MDO
>129S
SPI_DIR_MC
MAIN
SPI_DIR_MS
BOARD
RESET_DIR
(5/9)
(Page 45)
D3.3V
DIR_MUTE
RESET_SRC
LUTE_I2S_DATA_I
LUTE_I2S_LRCK_I
>125S
LUTE_I2S_BCK_I
MAIN
LUTE_I2S_MCK_O
BOARD
LUTE_I2S_DATA_O
(4/9)
(Page 44)
LUTE_I2S_LRCK_O
LUTE_I2S_BCK_O
SYS SET